Semiconductor Package Passive Device Integration
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Solution Overview
Problem
Conventional semiconductor packages have complex and costly processes for integrating passive devices, which increase production costs and complexity.
Innovation Solution
A method involving a substrate with grooves and conductive via structures, where metal layers and dielectric layers form capacitors and inductors, integrated with protective layers to simplify the process and reduce product size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive devices are integrated into the package unit by semiconductor packaging process and wire-bonding method, then the package unit can be electrically connected to the substrate, but the process becomes complex and cost increases
Solution Approach 1:
The patent merges the capacitor and inductor structures with the substrate and interconnection layers. The capacitor is formed using first and second metal layers with a dielectric layer between them, while the inductor is formed using a third metal layer with patterned conductive paths. These passive devices are integrated directly into the package structure without requiring separate semiconductor packaging processes or wire-bonding methods, thereby simplifying the overall manufacturing process while maintaining electrical connection reliability
2Reliability
If passive devices are integrated into the package unit by semiconductor packaging process, then electrical connection is achieved, but production cost increases
Solution Approach 1:
The patent combines the formation of passive devices with the standard PCB manufacturing process. The capacitor and inductor are created using screen printing, electroplating, and reflow soldering techniques that are already part of the PCB fabrication workflow. This integration eliminates the need for separate semiconductor packaging processes and wire-bonding operations, thereby reducing production costs while ensuring reliable electrical connections
3Reliability
If passive devices are integrated into the package unit, then electrical connection is achieved, but product size increases
Solution Approach 1:
The patent transitions from three-dimensional discrete passive devices to two-dimensional planar structures. The capacitor is formed as a stacked structure with metal layers separated by a dielectric layer, while the inductor is created as a patterned conductive path on the PCB surface. This dimensional reduction allows the passive devices to be integrated directly into the package footprint without significantly increasing the overall product size
Data Source
AI summary
The present invention relates to a semiconductor package and a method for making the same. The semiconductor package comprises a substrate, a first metal layer, a first dielectric layer, a first upper electrode, a first protective layer, a second metal layer and a second protective layer. The substrate has at least one via structure. The first metal layer is disposed on a first surface of the substrate, and comprises a first lower electrode. The first dielectric layer is disposed on the first lower electrode. The first upper electrode is disposed on the first dielectric layer, and the first upper electrode, the first dielectric layer and the first lower electrode form a first capacitor. The first protective layer encapsulates the first capacitor. The second metal layer is disposed on the first protective layer, and comprises a first inductor. The second protective layer encapsulates the first inductor. Whereby, the first inductor, the first capacitor and the via structure are integrated into the semiconductor package, so that the size of the product is reduced.