Semiconductor Package Layout for Stable Passive Element Mounting
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Solution Overview
Problem
Semiconductor packages with high-performance chips are prone to system malfunctions and performance degradation due to voltage noise in the high frequency band, and mounting passive elements on these packages can lead to cracks from external shocks and temperature changes.
Innovation Solution
A semiconductor package design featuring a package substrate with multiple redistribution layers, a protective layer exposing a redistribution layer, UBM pads, a dummy pattern, and an insulating pattern supporting a passive element, which is connected to UBM pads to enhance stability and prevent cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive elements are mounted on the semiconductor package to remove voltage noise and increase power integrity, then voltage noise is reduced and power integrity is improved, but cracks occur in the passive elements due to external shocks and temperature changes
Solution Approach 1:
The patent introduces a cushioning layer between the passive element and the substrate that absorbs and distributes mechanical stress before it reaches the passive element. This layer acts as a shock absorber that prevents cracks from forming in the passive element during thermal cycling and mechanical stress, while still allowing the passive element to perform its voltage noise filtering function effectively.
Solution Approach 2:
The patent employs a composite structure consisting of the passive element, cushioning layer, and substrate made from materials with different mechanical and thermal properties. The cushioning layer is specifically selected to have high elasticity and stress distribution capabilities, creating a composite system that combines the electrical performance benefits of the passive element with the mechanical resilience of the cushioning material, thereby preventing cracks while maintaining power integrity improvements.
2Object-generated harmful factors
If passive elements are mounted on the semiconductor package to reduce voltage noise, then voltage noise is reduced, but the physical stability of passive elements decreases due to cracks from external shocks and temperature changes
Solution Approach 1:
The cushioning layer is positioned between the passive element and substrate to provide beforehand protection against thermal expansion and contraction stresses. This layer maintains the physical stability of the passive element during temperature changes while allowing the passive element to continue filtering voltage noise effectively.
Solution Approach 2:
The patent changes the mechanical parameters of the mounting structure by introducing a cushioning layer with specific elastic modulus and thickness parameters. These parameter changes allow the structure to accommodate thermal expansion and mechanical shocks without compromising the passive element's physical stability or its ability to reduce voltage noise.
Data Source
AI summary
A semiconductor package includes: a package substrate including first and second sides that are opposite to each other, and including an insulating member and a plurality of redistribution layers; a semiconductor chip disposed on the first side and including a plurality of contact pads that are connected to a first redistribution layer of the plurality of redistribution layers; a protective layer disposed on the second side and exposing a portion of a second redistribution layer of the plurality of redistribution layers; a plurality of under bump metallurgy (UBM) pads disposed on the second side and connected to the exposed portion of the second redistribution layer; a dummy pattern formed on the protective layer; an insulating pattern covering the dummy pattern; and a passive element disposed on the insulating pattern and a first set of UBM pads of the plurality of UBM pads.