Semiconductor Package PDN Layout for Stacked-Die Heat Dissipation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packages face challenges in thermal conductivity due to limited via structures between stacked semiconductor dies, leading to inefficient heat dissipation and compromised thermal performance, which hampers the overall performance of stacked semiconductor devices.
Innovation Solution
Incorporating PDN structures with extended lateral lengths and connecting them to additional conductive structures, including thermal bonding vias and dummy conductive lines, to enhance thermal conductivity without affecting electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If more via structures are added between stacked semiconductor dies to improve thermal conductivity, then thermal performance improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the thermal conduction path into multiple parallel via structures distributed across the semiconductor die. Instead of relying on a single thermal via, multiple vias are created to divide the heat dissipation function, allowing heat to conduct through multiple pathways simultaneously, thereby improving overall thermal conductivity without requiring any single via to be excessively complex
Solution Approach 2:
The patent makes the via structures multi-functional by using them for both electrical connection and thermal conduction. The same via structures that provide electrical interconnect between stacked dies also serve as thermal pathways, eliminating the need for separate dedicated thermal vias and reducing overall device complexity
2Temperature
If the lateral length of PDN structures is extended to improve thermal conductivity, then heat dissipation improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent merges the power delivery network (PDN) structures with thermal conduction pathways. The PDN traces are designed to extend laterally and simultaneously serve both electrical power distribution and thermal conduction functions. This integration allows the existing PDN infrastructure to be utilized for heat dissipation without requiring separate dedicated thermal traces, thereby improving heat dissipation while avoiding additional manufacturing precision requirements
Solution Approach 2:
The PDN structures are made multi-functional by enabling them to perform both electrical power delivery and thermal conduction. The same conductive traces that distribute power across the die also serve as heat sinks and thermal pathways, allowing extended lateral dimensions to benefit both electrical performance and thermal management without increasing manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly improves thermal conductivity and heat dissipation in semiconductor packages by allowing more efficient heat propagation paths, maintaining electrical performance and reducing IR drop.
Implementation Method 1
improves thermal conductivity and heat dissipation in semiconductor packages by allowing more efficient heat propagation paths
Implementation Method 2
Incorporating PDN structures with extended lateral lengths and connecting them to additional conductive structures, including thermal bonding vias and dummy conductive lines, to enhance thermal conductivity
Data Source
AI summary
A method for fabricating semiconductor devices is disclosed herein. The method includes forming a plurality of device features along a major surface of a first silicon substrate. The method includes forming a plurality of metallization layers formed over the plurality of device features, where at least a first conductive line, disposed in a topmost one of the plurality of metallization layers, is configured to deliver a power supply voltage. The method includes forming a plurality of first via structures in electrical contact with the first conductive line. The method includes bonding the first silicon substrate to a second silicon substrate, where the second silicon substrate has a through via structure extending through the second silicon substrate. At least one of the plurality of first via structures is in electrical contact with the through via structure.