Semiconductor Package Layout for Faster Photo Relay Switching
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Solution Overview
Problem
The operation speed of contactless relays, such as photo relays, used in IC testers is not sufficient to keep pace with the increasing clock frequency exceeding 1 GHz, leading to inefficiencies in measurement processes.
Innovation Solution
A semiconductor package design that includes a non-conductive first rigid plate for fixing the PDA chip, reducing parasitic capacitance and enhancing the operation speed of the photo relay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional semiconductor package structure is used, then the structure is simple and easy to manufacture, but the parasitic capacitance is high which limits operation speed
Solution Approach 1:
The package structure is segmented into distinct functional layers: a first rigid plate for mounting the light-emitting component, a second rigid plate for mounting the light-receiving component, and a flexible printed circuit board connecting them. This segmentation allows each layer to be optimized independently for its specific function, reducing overall parasitic capacitance while maintaining manufacturability through modular assembly.
Solution Approach 2:
A flexible printed circuit board is introduced as an intermediary element between the two rigid plates. This intermediary provides electrical connections while maintaining physical separation between the light-emitting and light-receiving components, thereby reducing parasitic capacitance. The FPCB acts as a mediator that enables signal transmission without direct contact between the high-voltage and low-voltage sides.
2Reliability
If the distance between light-emitting and light-receiving components is reduced, then coupling efficiency improves, but parasitic capacitance increases reducing operation speed
Solution Approach 1:
The optical coupling medium is engineered with specific local properties: it is transparent to allow light transmission, has controlled thickness to optimize coupling efficiency, and is positioned precisely between the light-emitting and light-receiving components. This localized optimization of the coupling medium's properties achieves high coupling efficiency without requiring the components to be in direct contact, thereby maintaining low parasitic capacitance.
Solution Approach 2:
The problem of coupling efficiency versus parasitic capacitance is solved by transitioning from a one-dimensional proximity relationship to a three-dimensional optical coupling path. Light travels through the transparent coupling medium in a controlled optical path, allowing efficient energy transfer without requiring minimal physical distance between electrical components. This dimensional approach to coupling decouples the relationship between physical proximity and coupling efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reduced parasitic capacitance in the semiconductor package improves the operation speed of the photo relay, enabling it to match the high operation speeds required in modern IC testers, thus enhancing measurement efficiency.
Implementation Method 1
an upper surface of the PDA chip 10 is optically coupled to a light-emitting surface of the LED chip 40
Data Source
AI summary
A semiconductor package includes a PDA chip, a MOS chip, and a wiring plate including a first principal surface and a second principal surface, the first principal surface being provided with a first rigid plate that is non-conductive and a second rigid plate that is conductive, the PDA chip being fixed to the first rigid plate by using a non-conductive bonding agent, a lower surface terminal of the MOS chip being soldered to the second rigid plate, the second principal surface being provided with an input terminal and an output terminal, the input terminal being electrically connected to the PDA chip, the output terminal being electrically connected to the second rigid plate.