Semiconductor Package Heat Dissipation Layers and Pillars
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Solution Overview
Problem
Semiconductor packages, particularly wafer level packages, face limitations in adhesion, handling, and testing due to their small size, and existing solutions like ball grid array (BGA) packages are constrained by molding structures and integrated circuit boards, which hinder thickness reduction and heat dissipation.
Innovation Solution
A semiconductor package design featuring a bottom package with a first heat dissipation layer on a semiconductor chip, a second heat dissipation layer with protrusions for enhanced heat transfer, and a top package connected via connection pillars, allowing for improved heat dissipation and reduced thickness without the need for molding structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If wafer level package is used to reduce thickness, then package thickness is reduced, but adhesion and handling become difficult
Solution Approach 1:
The package structure is segmented into distinct functional layers including a support layer, heat dissipation layer, and encapsulant layer. The support layer provides mechanical strength while the heat dissipation layer manages thermal properties, allowing each layer to optimize its specific function without compromising overall package integrity
Solution Approach 2:
The invention transitions from traditional planar BGA packaging to a vertically stacked WLP architecture, utilizing the vertical dimension to achieve thickness reduction while maintaining functional performance through multi-layer construction
2Reliability
If BGA package with molding structure is used, then adhesion and handling are improved, but package thickness increases
Solution Approach 1:
The invention extracts and eliminates the traditional molding compound layer from the package structure, replacing it with a thinner encapsulant layer that provides necessary protection without adding excessive thickness
Solution Approach 2:
The support layer is strategically positioned and dimensioned to provide localized mechanical strength and adhesion where needed, while allowing other regions to be optimized for heat dissipation and electrical connectivity
3Stability of the object's composition
If conventional package design is used, then structural integrity is maintained, but heat dissipation performance is insufficient
Solution Approach 1:
The support layer serves multiple functions simultaneously: providing mechanical strength and structural integrity, enabling heat dissipation through its material properties and geometry, and facilitating electrical connectivity through integrated connection pillars
Solution Approach 2:
The package employs composite material construction with the support layer made from materials optimized for mechanical strength and thermal conductivity, while the encapsulant provides protective properties, creating a multi-material system that balances structural integrity with heat dissipation performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances heat dissipation characteristics and facilitates easier electrical connections, addressing the limitations of existing packages by providing superior thermal management and reliability.
Implementation Method 1
a first heat dissipation layer disposed on the semiconductor chip; and a second heat dissipation layer disposed on the first heat dissipation layer
Implementation Method 2
the second heat dissipation layer including a body and a first protrusion projecting toward the connection pillar from a sidewall of the body
Data Source
AI summary
A semiconductor package comprising: a semiconductor chip; a connection pillar that is disposed adjacent to the semiconductor chip; a first heat dissipation layer disposed on the semiconductor chip; and a second heat dissipation layer disposed on the first heat dissipation layer, the second heat dissipation layer including a first protrusion extending beyond a perimeter of the semiconductor chip and extending towards the connection pillar.