Semiconductor Package Conductive Pillars Interposer Area
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Solution Overview
Problem
In three-dimensional semiconductor packages, fine pitch interconnections occupy a small portion of the interposer, leading to increased area and complexity, while larger TSV diameters cause misalignment and higher costs, and small diameters result in short issues, especially for grounding or power pads.
Innovation Solution
A semiconductor device package design featuring a substrate with an interposer, conductive pillars, and encapsulants, where the conductive pillars have a larger width and height than the TSVs to prevent shorts and misalignment, and the interposer can be minimized in size to reduce costs, with voids in the encapsulant allowing for efficient packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSV diameters are increased, then reliability is improved, but area of the interposer increases
Solution Approach 1:
The patent divides the interconnection structure into two distinct components: TSVs for fine pitch connections and conductive pillars for coarse pitch connections. This segmentation allows each component to be optimized independently - TSVs can maintain small diameters for area efficiency while conductive pillars provide larger cross-sections for reliability in high-current paths.
Solution Approach 2:
The patent applies different structural qualities to different locations and functions within the package. Conductive pillars with larger cross-sections are strategically placed for power and ground connections where high current flow is expected, while TSVs with smaller diameters are used for signal connections. This local differentiation optimizes both area utilization and reliability where needed.
2Area of stationary object
If TSV diameters are decreased, then area of the interposer is reduced, but misalignment occurs and manufacturing complexity increases
Solution Approach 1:
By segmenting the interconnection function between TSVs and conductive pillars, the patent allows TSVs to be smaller in diameter without compromising overall alignment tolerance. The conductive pillars serve as robust alignment references with larger cross-sections, making the manufacturing process more tolerant to variations while maintaining small interposer area.
3Area of stationary object
If TSV diameters are decreased, then area of the interposer is reduced, but cost of the interposer increases
Solution Approach 1:
The patent segments the interconnection structure to allow TSVs to be smaller for area efficiency while introducing conductive pillars that simplify certain manufacturing aspects. The conductive pillars can be formed using standard semiconductor fabrication processes, and their larger size reduces sensitivity to alignment variations, potentially lowering manufacturing costs despite the added structural complexity.
4Area of stationary object
If TSV diameters are small, then area is reduced, but short issues occur for grounding or power pads
Solution Approach 1:
The patent applies the local quality principle by providing conductive pillars with larger cross-sections specifically at locations requiring high current capacity (power and ground connections), while maintaining smaller TSV diameters for other connections. This localized enhancement of conductive cross-section prevents short issues in high-current paths without increasing the overall interposer area.
Data Source
AI summary
At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate, an interposer disposed on the substrate, a conductive pillar disposed on the substrate, a first semiconductor device disposed on the interposer and electrically connected to the conductive pillar, a second semiconductor device disposed on the interposer, and an encapsulant surrounding the conductive pillar. The first semiconductor device includes a first conductive pad electrically connected to the interposer. The second semiconductor device includes a second conductive pad electrically connected to the interposer.