Semiconductor Package Recovery Layer for Molding Pit Planarity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller, more efficient packaging techniques for semiconductor devices due to the need for miniaturization, higher speed, and lower power consumption, particularly in filling pits in molding materials formed during CMP, grinding, or etch processes, which affect the planarity and reliability of interconnect structures in stacked semiconductor devices.
Innovation Solution
The use of a recovery material, such as a polymer coating, is applied to fill pits in the molding material and cover integrated circuit dies and through-vias, improving planarity and preventing the formation of dielectric layers within these pits, thereby enhancing the reliability and yield of interconnect structures in packaged semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If CMP, grinding, or etch processes are used to fabricate stacked semiconductor devices, then integration density and miniaturization are improved, but pits are formed in the molding material which reduce manufacturing precision and reliability
Solution Approach 1:
The recovery material is applied in advance to fill the pits in the molding material before the subsequent dielectric layer formation process. This preliminary action prevents the pits from affecting the planarity of the surface where interconnect structures will be formed, thereby resolving the contradiction between achieving high integration density through CMP/grinding/etch processes and maintaining manufacturing precision.
2Ease of manufacture
If pits in molding material are left unfilled, then manufacturing process is simpler, but dielectric layers may form within pits causing shorts and breaks in wiring
Solution Approach 1:
The recovery material acts as an intermediary substance that fills the pits in the molding material. This intermediary layer prevents the formation of dielectric layers within the pits, thereby eliminating the risk of shorts and breaks in wiring while maintaining the overall simplicity of the packaging process. The recovery material bridges the gap between the molded substrate and the interconnect structures.
3Manufacturing precision
If recovery material is applied to fill pits, then planarity and reliability are improved, but additional manufacturing steps are required
Solution Approach 1:
The recovery material changes the physical parameters of the molding material surface by filling the pits and creating a planar surface. This parameter change (from non-planar to planar) is achieved through a coating process that, while adding a step, uses standard semiconductor manufacturing techniques. The benefit of improved surface planarity and reliability outweighs the moderate increase in process complexity.
Data Source
AI summary
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die and a first interconnect structure coupled to the integrated circuit die. Through-vias are also coupled to the first interconnect structure. A molding material is disposed around the integrated circuit die and the through-vias over the first interconnect structure. The molding material has a pit disposed therein. A recovery material is disposed within the pit in the molding material. A second interconnect structure is disposed over the molding material, the recovery material, the integrated circuit die, and the through-vias.