Semiconductor Package Redistribution Layout for Pitch Compatibility
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Solution Overview
Problem
Existing semiconductor packages face challenges in standardization, miniaturization, and compatibility, which affect their operating speeds and electrical connections.
Innovation Solution
A semiconductor package is designed with a redistribution layer that includes multiple redistribution pads on one surface and a semiconductor chip on the opposing surface, along with conductive structures and external connection terminals, allowing for flexible pitch arrangements and improved electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding wires or bumps are used to electrically connect the semiconductor chip to the printed circuit board, then electrical connections are established, but the package size and complexity increase
Solution Approach 1:
The patent extracts the bonding wire/bump connection function from the traditional PCB mounting approach and integrates it into the semiconductor chip itself through redistribution layers and conductive structures, eliminating the need for separate bonding components
Solution Approach 2:
The patent merges the electrical connection function with the semiconductor chip structure by integrating redistribution layers, conductive structures, and external connection terminals directly onto the chip, combining multiple functions into a unified structure
2Ease of operation
If the pitch of external connection terminals is increased for easier connection, then ease of operation improves, but the package area increases
Solution Approach 1:
The patent transitions from a two-dimensional pitch-based connection approach to a three-dimensional structure with redistribution layers at different heights, allowing terminals to be arranged in multiple layers and directions, thus achieving compact area with maintained connection ease
Solution Approach 2:
The patent implements nested redistribution layers where multiple conductive patterns are stacked vertically, with each layer containing connection terminals that can be accessed from different directions, effectively nesting connection functions within a compact footprint
3Productivity
If the pitch of redistribution pads is decreased for higher integration, then productivity increases, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the redistribution function into multiple discrete layers, with each layer handling specific routing and connection tasks. This segmentation allows each layer to be manufactured with relaxed precision requirements while achieving high overall integration through vertical stacking
Solution Approach 2:
The patent introduces intermediate redistribution layers that act as mediators between the chip pads and external terminals. These intermediate layers provide transition zones where signal routing can be redistributed with larger pitch requirements, reducing the precision burden on critical connection points
Data Source
AI summary
A semiconductor package includes a redistribution layer having a first surface and a second surface opposite to each other, the redistribution layer including a plurality of first redistribution pads on the first surface, a semiconductor chip on the second surface of the redistribution layer, an active surface of the semiconductor chip facing the redistribution layer, a plurality of conductive structures on the second surface of the redistribution layer, the plurality of conductive structures being spaced apart from the semiconductor chip, and a plurality of external connection terminals on and coupled to the conductive structures, the plurality of first redistribution pads have a pitch smaller than a pitch of the plurality of external connection terminals.