Semiconductor Package Hybrid Bonding with Low-Temperature Plasma Layers
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Solution Overview
Problem
The semiconductor industry faces challenges in forming efficient and reliable bonding layers for 3D integrated circuits (3DICs) that are compatible with temperature-sensitive devices, as conventional high-temperature deposition processes can damage these devices and require complex processes.
Innovation Solution
A plasma treatment is used to form a bonding layer on silicon substrates at a lower temperature, which is then used for hybrid bonding between integrated circuit structures, allowing for metal-to-metal and dielectric-to-dielectric bonding while maintaining device performance and simplifying the process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high-temperature deposition processes are used to form bonding layers, then the bonding layer can be formed with sufficient quality for hybrid bonding, but temperature-sensitive devices are damaged and the process becomes complex
Solution Approach 1:
The patent changes the temperature parameter from conventional high-temperature deposition to low-temperature plasma treatment, forming the bonding layer at temperatures that do not damage temperature-sensitive devices while maintaining bonding quality
Solution Approach 2:
The patent replaces the thermal deposition mechanism with a plasma-based chemical vapor deposition process, using plasma chemistry rather than thermal energy to form the bonding layer, thereby avoiding thermal damage to devices
2Reliability
If conventional high-temperature deposition processes are used to form bonding layers, then the bonding layer can be formed with sufficient quality, but the process complexity increases
Solution Approach 1:
The patent simplifies the process by changing from multi-step high-temperature deposition to a single-step low-temperature plasma treatment, reducing process complexity while maintaining bonding layer quality
Solution Approach 2:
The patent replaces complex thermal deposition equipment and processes with plasma treatment equipment and processes, simplifying the overall manufacturing process while achieving the same bonding layer formation objective
3Object-affected harmful factors
If lower temperature plasma treatment is used to form bonding layers, then temperature-sensitive devices are protected and process complexity is reduced, but the bonding layer must be formed effectively at lower temperature
Solution Approach 1:
The patent uses plasma chemistry to enable bonding layer formation at low temperatures, where plasma provides the necessary activation energy through chemical reactions rather than thermal energy, achieving effective bonding layer formation without thermal damage
Solution Approach 2:
The patent changes the chemical state and reactivity parameters through plasma treatment, creating a bonding layer with appropriate properties for hybrid bonding even at low temperatures by controlling plasma chemistry rather than thermal parameters
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents damage to temperature-sensitive devices and reduces the thermal budget, enhancing the performance and reliability of semiconductor packages by enabling efficient bonding with less complexity in the process.
Implementation Method 1
A plasma treatment is performed to transform a top portion of the silicon layer to a first bonding layer on the remaining silicon layer of the first integrated circuit structure
Data Source
AI summary
A method of forming a semiconductor package includes the following operations. A first integrated circuit structure is provided, and the first integrated circuit structure includes a first substrate and a silicon layer over the first substrate. A plasma treatment is performed to transform a top portion of the silicon layer to a first bonding layer on the remaining silicon layer of the first integrated circuit structure. A second integrated circuit structure is provided, and the second integrated circuit structure includes a second substrate and a second bonding layer over the second substrate. The second integrated circuit structure is bonded to the first integrated circuit structure through the second bonding layer of the second integrated circuit structure and the first bonding layer of the first integrated circuit structure.


