Semiconductor Package Post Structure for Residue-Free Interconnects

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor packages face challenges in achieving high reliability due to issues with conductive posts, such as residue formation that can affect the growth of metal posts and reduce reliability.

Innovation Solution

The semiconductor package includes a first redistribution structure with upper pads, a semiconductor chip, an encapsulant, a second redistribution structure, and a plurality of posts that penetrate the encapsulant to connect the upper pads to the second redistribution structure. A metal layer with a step difference is used between the upper pads and the posts, and a seed layer is disposed between the metal layers and the posts to enhance reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional metal layer structure is used without step difference, then the manufacturing process is simpler, but residue formation occurs that affects post growth and reduces reliability

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmetal layer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal layer is segmented into multiple portions (first metal layer portion, second metal layer portion, third metal layer portion) with different widths arranged in sequence. This segmentation creates step differences that prevent residue formation and improve post growth reliability, while maintaining a manageable manufacturing process through systematic layer differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces dimensional variation in the metal layer structure by creating width differences across multiple portions. This dimensional change from a uniform to a stepped structure eliminates residue formation issues and enhances the reliability of electrical connections without significantly complicating the manufacturing process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the metal layer width is reduced to prevent residue formation, then post growth reliability improves, but the electrical connection area is reduced

Engineering Contradiction:
Improvepost growth reliabilityVSAvoidmetal layer area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The metal layer is divided into multiple portions with progressively reducing widths. The first portion maintains a larger width for adequate electrical connection area, while subsequent portions reduce in width to prevent residue formation. This segmented approach allows the structure to simultaneously provide sufficient connection area and reliable post growth by optimizing different regions for different functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the metal layer are given different width characteristics suited to their specific functions. The first portion has a larger width optimized for electrical connection, while the second and third portions have reduced widths optimized for preventing residue formation and enabling reliable post growth. This local quality differentiation resolves the contradiction between connection area and reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the reliability of the semiconductor package by reducing residue formation and enhancing the growth of reliable metal posts, thereby ensuring consistent and high-performance connections.

Implementation Method 1

a seed layer disposed between the metal layers and the plurality of posts

Methodology Applied
Scientific EffectSeed layer deposition: Deposition (physical)

Data Source

PatentUS20250118639A1Semiconductor package
Publication Date: 2025.04.10 SAMSUNG ELECTRONICS CO LTD
  • US20250118639A1 patent drawing
  • US20250118639A1 patent drawing
  • US20250118639A1 patent drawing

AI summary

A semiconductor package includes a first redistribution structure including upper pads; a semiconductor chip disposed on the first redistribution structure; an encapsulant on the first redistribution structure and surrounding the semiconductor chip; a second redistribution structure disposed on the encapsulant and including an upper redistribution layer; a plurality of posts penetrating the encapsulant and electrically connecting the upper pads of the first redistribution structure to the upper redistribution layer of the second redistribution structure; metal layers between the upper pads and the plurality of posts and having an upper surface having a first step difference with an upper surface of an edge of the upper pads; and a seed layer between the metal layers and the plurality of posts.