Semiconductor Package Power Bar and Decoupling Capacitor Design
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Solution Overview
Problem
The increasing complexity of semiconductor dies and the need for more external connection pins in integrated circuit packages lead to higher packaging costs and reliability issues due to power noise and crowded bond wires.
Innovation Solution
A semiconductor package design featuring a die pad with power leads along its peripheral edge, connecting bars, and power bars that are integrally connected to power leads, with decoupling capacitors mounted between the power bars and connecting bars to form a power ring, reducing power impedance and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of external connection pins is increased to accommodate more functionality, then the functionality of the semiconductor package is improved, but the packaging cost increases
Solution Approach 1:
The patent combines multiple power supply functions into a single integrated power bar structure that serves multiple purposes: providing power connections, acting as a mounting substrate for decoupling capacitors, and forming part of the signal transmission path. This consolidation reduces the number of separate components and connection pins needed, thereby maintaining functionality while reducing packaging cost.
Solution Approach 2:
The power bar is designed to perform multiple functions simultaneously: it provides electrical power connections to the semiconductor die, serves as a mounting platform for decoupling capacitors, and acts as a structural support element. This multi-functionality eliminates the need for separate dedicated structures for each function, reducing overall pin count and packaging complexity.
2Productivity
If the integration and performance of semiconductor dies are increased, then the performance of the semiconductor package is improved, but power noise impact on I/O signaling worsens
Solution Approach 1:
The patent introduces decoupling capacitors as intermediary elements between the power bar and ground. These capacitors act as local energy reservoirs that quickly supply or absorb current during voltage transitions, preventing power noise from propagating through the power distribution network and affecting I/O signaling on high-performance semiconductor dies.
Solution Approach 2:
The decoupling capacitors are pre-positioned on the power bar before the semiconductor die is mounted. This preliminary placement ensures that the capacitors are optimally positioned to provide immediate power noise suppression during die operation, addressing power quality issues before they can affect signal integrity.
3Quantity of substance
If multiple bond wires are bonded onto one single inner lead, then the connection density is improved, but reliability and yield issues worsen
Solution Approach 1:
The patent segments the power connection function across multiple power bar contact regions rather than concentrating all bond wires on a single inner lead. The power bar is divided into multiple contact areas that can distribute bond wires more evenly, reducing the wire density on any single lead and improving reliability while maintaining overall connection density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves lower power impedance, shorter decoupling paths, higher assembly yield, and reduced power lead count by distributing power wires over a larger area and incorporating in-package decoupling capacitors, addressing the challenges of power noise and reliability.
Implementation Method 1
A capacitor is mounted between the power bar and the connecting bar... A capacitor is mounted between the power bar and the die pad... a capacitor comprising a first terminal and a second terminal. The first terminal is electrically connected to the power bar and the second terminal is electrically connected a ground level
Data Source
AI summary
A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.