Semiconductor Package With Printed Protection Film
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current wafer level packaging methods face challenges in achieving size reduction, high-performance interconnects, and heterogeneous integration for system-in-package or system-on-chip applications, particularly in efficiently debonding semiconductor packages from carriers and forming precise connections and markings without additional laser processing.
Innovation Solution
A manufacturing method involving a carrier with a debond layer, dielectric material, and through interlayer vias, where dies are attached and encapsulated, followed by a redistribution layer, conductive elements, and a protection film formed through printing, allowing for efficient debonding and precise marking without laser drilling, enabling cost-effective and high-yield semiconductor package production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional wafer level packaging methods are used, then semiconductor packages can be produced, but additional laser processing is required for debonding and marking, increasing production cost and time
Solution Approach 1:
The patent applies preliminary action by pre-forming through-vias that extend through the entire molding compound during the initial packaging process. This eliminates the need for subsequent laser drilling operations, as the connection pathways are already established before the package is completed and mounted. The through-vias are created using conventional photolithography and plating processes integrated into the standard wafer-level packaging flow.
Solution Approach 2:
The patent extracts the laser processing step entirely from the manufacturing process by replacing it with pre-formed through-vias. The harmful and time-consuming laser drilling and marking operations are removed by incorporating the via formation into the earlier molding compound fabrication stage, using standard semiconductor manufacturing techniques instead of post-processing laser methods.
2Manufacturing precision
If laser drilling is used to form through-vias, then connections can be established, but production cost and processing time increase
Solution Approach 1:
The through-vias are formed in advance during the molding compound fabrication process, before the semiconductor die is mounted and before final package completion. This preliminary via formation eliminates the need for time-consuming laser drilling operations later in the process, reducing overall manufacturing cycle time while maintaining precision through controlled photolithography and electroplating processes.
3Volume of moving object
If conventional packaging methods are used, then packages can be manufactured, but size reduction and heterogeneous integration are limited
Solution Approach 1:
The patent transitions from planar two-dimensional packaging to three-dimensional vertical integration by forming through-vias that penetrate the molding compound and enabling stacking of multiple semiconductor dies. This vertical dimension allows heterogeneous integration of different die types and technologies in a compact footprint, achieving size reduction while enhancing adaptability and integration capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables efficient debonding of semiconductor packages from carriers, forms precise connections, and reduces production costs by eliminating the need for additional laser marking processes, resulting in higher product throughput and yield while maintaining high performance interconnects.
Implementation Method 1
a protection film is formed over the molding compound and the plurality of dies by a printing process
Data Source
AI summary
A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package has a redistribution layer, at least one die over the redistribution layer, through interlayer vias on the redistribution layer and aside the die and a molding compound encapsulating the die and the through interlayer vias disposed on the redistribution layer. The semiconductor package has connectors connected to the through interlayer vias and a protection film covering the molding compound and the die. The protection film is formed by a printing process.