Semiconductor Package With Embedded Printed Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in forming wire bonds on stacked multichip semiconductor packages is the stress-induced peeling between dies, which reduces production yield due to the difficulty in bonding adjacent to the overhanging side edge of the second die.
Innovation Solution
A semiconductor package design featuring a first die with bond pads connected by 3D-printed conductive wires and pads embedded in an encapsulant, eliminating the need for wire bonding and reducing stress, with the conductive pads and wires formed from materials like silver, gold, copper, or carbon nanotubes, and optionally including passive devices for enhanced connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wire bonding is used to connect stacked dies, then electrical connectivity between dies is achieved, but stress-induced peeling occurs between dies reducing production yield
Solution Approach 1:
The patent extracts and eliminates the wire bonding process from the stacked die configuration. By removing the wire bonds that cause stress-induced peeling, the invention directly addresses the reliability issue while maintaining electrical connectivity through alternative means (conductive adhesive or through-silicon vias), thereby resolving the contradiction between achieving connectivity and avoiding harmful stress effects
Solution Approach 2:
The patent replaces the mechanical wire bonding system with a chemical or material-based connection system (conductive adhesive or direct die-to-die bonding). This substitution eliminates the mechanical stress and peeling forces associated with wire bonding, thereby improving production yield while maintaining electrical connectivity
2Area of stationary object
If the second die is positioned to overlap the first die for compact packaging, then space utilization is improved, but wire bonding becomes difficult adjacent to the overhanging side edge
Solution Approach 1:
The patent removes the wire bonding step from the manufacturing process entirely. By eliminating this step, the difficulty of bonding adjacent to overhanging edges is completely resolved, while the compact stacked die configuration is maintained through alternative connection methods that are not constrained by the same geometric limitations
Solution Approach 2:
The patent introduces an intermediary material (conductive adhesive or direct bonding interface) between the dies that enables electrical connectivity without requiring wire bonds. This intermediary allows for compact die stacking and eliminates the manufacturing difficulties associated with wire bonding in overlapping configurations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the yield and reliability of semiconductor packages by eliminating stress-related peeling issues and allowing for direct, stress-free electrical connections between dies without the need for wire bonding, improving the overall production efficiency.
Implementation Method 1
The conductive wire and the conductive pad are integrally formed by using a three-dimensional (3D) printer
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A semiconductor package includes a semiconductor die having an active surface and a bottom surface opposite to the active surface; a plurality of bond pads distributed on the active surface of the semiconductor die; an encapsulant covering the active surface of the semiconductor die, wherein the encapsulant comprises a bottom surface that is flush with the bottom surface of the semiconductor; and a plurality of printed interconnect features embedded in the encapsulant for electrically connecting the plurality of bond pads. Each of the printed interconnect features comprises a conductive wire and a conductive pad being integral with the conductive wire.