Semiconductor Package Protrusion Redistributing Wiring Height

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Solution Overview

Problem

In the manufacturing of fan-out wafer-level packages, the increasing height of conductive structures leads to dispersion and process difficulties, resulting in longer process times and increased complexity.

Innovation Solution

A semiconductor package design featuring a redistribution wiring layer with protrusions and bonding pads, where conductive structures extend from the pads to reduce height requirements, allowing for a more efficient manufacturing process by forming conductive structures with reduced height and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the height of conductive structures is increased to connect lower and upper redistribution wiring layers, then electrical connectivity is achieved, but process difficulty and deviation increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidprocess difficulty
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces protrusions that extend upward from the lower redistribution wiring layer, creating a three-dimensional structure. This allows conductive structures to form on elevated surfaces, reducing the vertical height required for electrical connection while maintaining connectivity between layers through spatial reconfiguration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The protrusions are formed in advance before mounting the semiconductor device. This preliminary formation of elevated structures provides predetermined connection points, simplifying subsequent process steps and reducing process difficulty by establishing the electrical connection geometry early in the manufacturing sequence.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the height of conductive structures is increased to achieve electrical connectivity, then connectivity is established, but process time increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidprocess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By creating protrusions that extend vertically from the lower wiring layer, the patent enables conductive structures to achieve connectivity over shorter vertical distances. This dimensional reconfiguration reduces the required height of conductive structures, thereby decreasing formation time and overall process duration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The protrusions are formed beforehand, establishing the geometric framework for electrical connections prior to device assembly. This preliminary structuring eliminates the need for time-consuming post-assembly adjustments and accelerates the overall manufacturing process by pre-positioning connection interfaces.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If protrusions are added to the redistribution wiring layer to reduce conductive structure height, then process time is reduced, but structural complexity increases

Engineering Contradiction:
Improveprocess timeVSAvoidstructural complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The lower redistribution wiring layer is segmented into multiple regions: flat areas for bonding pads and elevated protrusion areas for conductive structure formation. This segmentation allows different functional zones to be optimized independently, reducing overall process time while managing structural complexity through functional differentiation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The protrusions serve multiple functions: they provide elevated surfaces for conductive structure formation, establish mechanical support, and define spatial relationships for subsequent assembly steps. This multi-functionality reduces the need for additional separate structures, managing complexity while achieving process time reduction.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240079299A1Semiconductor package and method of manufacturing the semiconductor package
Publication Date: 2024.03.07 SAMSUNG ELECTRONICS CO LTD
  • US20240079299A1 patent drawing
  • US20240079299A1 patent drawing
  • US20240079299A1 patent drawing

AI summary

A semiconductor package includes a first redistribution wiring layer having a first surface and a second surface opposite to the first surface, the first redistribution wiring layer having protrusions protruding from the first surface and a plurality of first bonding pads provided on the protrusions, a first semiconductor device mounted on the first redistribution wiring layer via conductive bumps, a plurality of conductive structures respectively extending from the first bonding pads around the first semiconductor device, and a second redistribution wiring layer disposed on the conductive structures and electrically connected to the first redistribution wiring layer.