Semiconductor Package Redistribution Layer Segmentation

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Solution Overview

Problem

Current methods for manufacturing semiconductor packages with stacked dies face challenges in reducing the footprint and efficiently connecting multiple dies while maintaining performance and heat dissipation.

Innovation Solution

A semiconductor package design featuring a redistribution layer with electrically isolated segments to connect dies and conductive plugs, along with a method involving the formation of insulative layers and conductive structures to facilitate stacking and heat dissipation, including a passivation layer and solder bumps for enhanced connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If stacked three-dimensional integrated circuits are implemented to increase performance and density, then the footprint of the integrated circuit system is reduced, but the complexity of manufacturing and connecting multiple dies increases

Engineering Contradiction:
ImprovefootprintVSAvoidcomplexity of manufacturing and connecting multiple dies
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The redistribution layer is divided into multiple electrically isolated segments (first segment, second segment, third segment) that can be independently formed and connected to different dies. This segmentation allows complex interconnections to be broken down into simpler, manageable stages, reducing manufacturing complexity while enabling dense three-dimensional stacking

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from two-dimensional planar connections to three-dimensional vertical stacking by forming conductive plugs that penetrate through insulative layers to connect redistribution layer segments at different heights. This dimensional transition enables high-density interconnections while maintaining a compact footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple dies are stacked vertically to increase density, then the footprint is reduced, but the difficulty of establishing reliable electrical connections between dies increases

Engineering Contradiction:
ImprovedensityVSAvoidreliability of electrical connections
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Conductive plugs are formed in advance within insulative layers before the final die stacking is complete. This preliminary formation of conductive pathways ensures that connection points are pre-established and aligned, improving the reliability of electrical connections between multiple dies when they are subsequently mounted and connected

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If insulative layers and conductive structures are added to facilitate die stacking and heat dissipation, then connectivity and thermal management are enhanced, but the manufacturing process complexity increases

Engineering Contradiction:
Improveconnectivity and heat dissipationVSAvoidmanufacturing process complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The insulative layers serve multiple functions simultaneously: they provide electrical isolation between conductive elements, serve as structural support for die stacking, contain embedded conductive plugs for electrical connections, and facilitate thermal management. This multi-functionality reduces the need for separate dedicated structures, simplifying the overall manufacturing process while achieving connectivity and heat dissipation goals

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11605612B2Method of manufacturing semiconductor package
Publication Date: 2023.03.14 NAN YA TECH
  • US11605612B2 patent drawing
  • US11605612B2 patent drawing
  • US11605612B2 patent drawing

AI summary

The present disclosure provides a method of manufacturing a semiconductor package assembly. The method includes steps of providing a plurality of first dies arranged horizontally; forming a redistribution layer on the first dies and the first insulative material, wherein the redistribution layer is divided into a first segment and a second segment electrically isolated from the first segment; mounting a plurality of second dies on the first segment of the redistribution layer; depositing a second insulative layer on the second dies and the redistribution layer; and forming a plurality of conductive plugs penetrating through the second insulative material and contacting the second segment of the redistribution layer.