Semiconductor Package Redistribution Pattern Warpage Reliability
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Solution Overview
Problem
Existing semiconductor package technologies face reliability issues due to warpage, leading to damage such as cracks in inter-package connection terminals, which deteriorates the overall reliability and complexity of manufacturing, especially in package-on-package (PoP) type semiconductor packages.
Innovation Solution
A semiconductor package design that eliminates inter-package connection terminals by electrically connecting the first and second packages through redistribution patterns within encapsulation layers, using photosensitive insulating materials for encapsulation and redistribution structures, and optionally includes an electromagnetic shielding layer and thermal conductive elements for improved reliability and manufacturing simplicity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inter-package connection terminals are used to connect packages, then electrical connection between packages is achieved, but warpage causes cracks in terminals leading to poor reliability
Solution Approach 1:
The patent removes the vulnerable inter-package connection terminals from the system by implementing direct electrical connection through the redistribution pattern embedded in the encapsulation layer. This extraction of the problematic component eliminates the source of warpage-induced cracks while maintaining the essential electrical connection function between packages.
Solution Approach 2:
The patent merges the encapsulation layer with the electrical connection function by embedding the redistribution pattern directly within the encapsulation layer. This integration eliminates the need for separate connection terminals and their associated vulnerability to warpage, while the encapsulation layer simultaneously provides both mechanical protection and electrical interconnection.
2Ease of manufacture
If traditional package structures with separate connection terminals are used, then electrical connection is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent combines multiple functions into a single integrated structure where the encapsulation layer simultaneously serves as the mechanical protective covering and the electrical interconnection medium through its embedded redistribution pattern. This merger reduces the number of discrete components and assembly steps required in manufacturing.
Solution Approach 2:
The encapsulation layer is designed to perform multiple functions: mechanical protection of the semiconductor chip, electrical insulation, and electrical interconnection through the embedded redistribution pattern. This multi-functionality reduces the overall component count and simplifies the manufacturing process by eliminating the need for separate connection terminals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability of the semiconductor package by avoiding vulnerable inter-package connection terminals, simplifying manufacturing processes, and enabling thinner, more reliable PoP type semiconductor packages with improved thermal and electromagnetic shielding.
Implementation Method 1
the first encapsulation layer includes a photosensitive insulating material
Data Source
AI summary
A semiconductor package includes a first package including a first semiconductor chip, a first encapsulation layer that covers the first semiconductor chip, and a first redistribution pattern connected to pads of the first semiconductor chip and a second package on the first package, the second package including a second semiconductor chip, a second encapsulation layer that covers the second semiconductor chip, and a second redistribution pattern connected to pads of the second semiconductor chip. The first redistribution pattern is connected to the second redistribution pattern through the first encapsulation layer.