Semiconductor Package Layout for Interference-Free Resin Molding
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Solution Overview
Problem
Existing semiconductor devices with integrated heat sinks and sealing resins face issues with the deterioration of the molded state due to power leads interfering with molding dies, which is a challenge in achieving a seamless integration.
Innovation Solution
A semiconductor device design where the power terminal is exposed from the sealing resin, surrounded by its peripheral edge, and the heat sink includes a base portion with an engagement recess for the resin, allowing for improved integration and molding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the heat sink and sealing resin are integrated with each other, then the work for attaching the sealing resin to the heat sink is eliminated, but the power lead projecting from the side surface of the sealing resin interferes with the molding die, causing deterioration of the molded state of the sealing resin
Solution Approach 1:
The power terminal is extracted from the interior of the sealing resin and positioned to project from the side surface, removing the interfering element from the molding process while maintaining electrical connectivity functions
Solution Approach 2:
The power terminal is repositioned from a conventional top-surface projection to a side-surface projection, changing its spatial dimension relative to the sealing resin and molding die interaction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the molded state of the sealing resin, ensuring a better integration of the heat sink and sealing resin, thereby improving the overall structure and functionality of the semiconductor device.
Implementation Method 1
a metal layer bonded to an obverse surface of the heat sink... The heat sink includes a base portion including the obverse surface, and a heat radiating portion connected to the base portion
Implementation Method 2
a first bonding layer bonding the obverse surface and the metal layer... a second bonding layer electrically bonding the conductive layer and the semiconductor element
Data Source
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AI summary
A semiconductor device includes a heat sink, a base material including an insulating layer and mounted on the heat sink on one side in a first direction, a first conductive layer bonded to the base material and located on a side opposite the heat sink with respect to the base material, a first semiconductor element bonded to the first conductive layer, a first power terminal electrically connected to the first conductive layer and the first semiconductor element, and a sealing resin covering the first conductive layer and the first semiconductor element. The first power terminal is exposed from the sealing resin. The first power terminal is surrounded by a peripheral edge of the sealing resin as viewed in the first direction.