Semiconductor Package Rounded Corners for Crack-Resistant Die Integration
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Solution Overview
Problem
Integration of multiple semiconductor devices into a single package is challenging due to thermal and mechanical stresses, which can lead to reliability issues and increased costs in manufacturing.
Innovation Solution
A semiconductor package design that includes an interposer with through semiconductor vias (TSVs) and semiconductor dies bonded via connectors, with an underfill and corner padding materials to secure electrical connections and reduce mechanical stress, and an encapsulant to protect the package, allowing for efficient integration of multiple dies in a single package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor devices are integrated into a single package, then device functionality and density are improved, but thermal and mechanical stresses increase leading to reliability issues
Solution Approach 1:
The patent segments the semiconductor package into distinct functional layers including an interposer substrate, multiple semiconductor dies, underfill materials, and corner padding structures. This segmentation allows each component to address specific stress management requirements while maintaining overall integration density.
Solution Approach 2:
The patent introduces underfill materials and corner padding structures as intermediary elements between the semiconductor dies and the package substrate. These intermediaries act as stress buffers that absorb thermal and mechanical stresses, preventing direct stress transmission that would compromise reliability.
2Adaptability or versatility
If multiple semiconductor devices are integrated into a single package, then device functionality is improved, but manufacturing costs increase
Solution Approach 1:
The patent employs preliminary bonding of semiconductor dies to the interposer substrate using standardized connectors and underfill materials. This preliminary assembly approach enables modular manufacturing where dies can be prepared and bonded separately, then integrated into the final package, reducing overall manufacturing complexity and cost.
3Reliability
If semiconductor dies are bonded via connectors with underfill material, then electrical connections are secured, but device complexity increases
Solution Approach 1:
The patent uses uniform underfill materials and standardized corner padding structures across all semiconductor dies in the package. This homogeneity in material selection and structural approach simplifies the manufacturing process and reduces the complexity of handling multiple different components, while still providing robust electrical connections.
Data Source
AI summary
Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.