3D Semiconductor Package Seal Ring for Connector Reliability

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Solution Overview

Problem

Three-dimensional integrated circuits (3DICs) face challenges with connectors that are prone to damage from stress and moisture/chemical invasion, leading to low reliability.

Innovation Solution

A package seal ring is introduced around functional bumps in 3DICs, comprising dummy bumps and vias that surround and protect the functional connectors, enhancing their reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If connectors are used to connect vertically separated dies in 3DIC, then integration density and operation speed are improved, but the connectors are subjected to damages from stress and moisture/chemical invasion, leading to low reliability

Engineering Contradiction:

Improveconnector reliabilityVSAvoidstress and moisture/chemical damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an underfill material as an intermediary substance between the die and substrate. This underfill material fills the gap and provides a protective barrier that shields the connectors (bumps) from harmful factors such as moisture, chemicals, and mechanical stress, thereby improving connector reliability without compromising the electrical connection function

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The underfill material is applied beforehand to provide cushioning and stress distribution. It compensates for thermal expansion differences and mechanical stresses before they can damage the connectors, acting as a preventive measure against stress-related failures

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Manufacturing precision

If feature size is reduced to increase device density, then power consumption is reduced, but manufacturing precision requirements increase

Engineering Contradiction:

Improvefeature size controlVSAvoiddevice density

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent employs parameter changes in the form of underfill material properties (viscosity, curing characteristics) and processing parameters (dispensing pressure, curing temperature and time) to achieve precise placement and protection of small-scale connectors, enabling high device density while maintaining manufacturing precision

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250210589A1Semiconductor package and manufacturing method thereof

Publication Date: 2025.06.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes: a first device die and a second device die stacked over the first device die; functional bumps, disposed between the first device die and the second device die, and electrically connected to the first device die and the second device die; and a first seal ring, comprising at least one dummy bump arranged along edges of the first device die and disposed between the first and second device dies, and laterally surrounding the functional bumps.