Semiconductor Package Thickness Reduction via Segmented Rigid Portions

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing package thickness while maintaining structural integrity and preventing deformation and cracking, especially when using low-elastic resin materials, which can lead to increased manufacturing costs and reduced bonding strength.

Innovation Solution

The semiconductor device incorporates a second semiconductor chip with a trench pattern and integral structure, using silicon substrates for the first and second portions to enhance rigidity and reduce thickness, eliminating the need for low-elastic resin materials, and optimizing the arrangement of terminal electrodes and interconnect members for improved bonding and sealing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If low-elastic resin materials are used to reduce package thickness, then package thickness is reduced, but bonding strength decreases and deformation/cracking occurs

Engineering Contradiction:

Improvepackage thicknessVSAvoidbonding strength

Core Design Contradiction:

Length of moving objectVSStrength

Solution Approach 1:

The second semiconductor chip is divided into a first region (semiconductor element portion) and a second portion (rigid portion), which are separated from each other. This segmentation allows the first region to be thin for reduced package thickness while the second portion provides rigidity and prevents deformation, resolving the contradiction between thinness and bonding strength.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses a composite structure combining a semiconductor element portion with a rigid portion made of rigid material. This composite design enables the package to achieve both reduced thickness (through the thin first region) and improved bonding strength (through the rigid second portion that prevents deformation and cracking).

Inventive Principle:

Principle #40Composite materials

2Length of moving object

If low-elastic resin materials are used to reduce package thickness, then package thickness is reduced, but manufacturing cost increases

Engineering Contradiction:

Improvepackage thicknessVSAvoidmanufacturing cost

Core Design Contradiction:

Length of moving objectVSEase of manufacture

Solution Approach 1:

The patent replaces expensive low-elastic resin materials with a more cost-effective rigid portion structure. The rigid portion can be formed from standard rigid materials at lower cost, eliminating the need for specialized low-elastic resin materials while still achieving the desired thin package design.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Length of moving object

If multiple semiconductor chips are stacked to reduce package thickness, then package thickness is reduced, but structural integrity and deformation prevention become difficult

Engineering Contradiction:

Improvepackage thicknessVSAvoidstructural integrity

Core Design Contradiction:

Length of moving objectVSStability of the object's composition

Solution Approach 1:

The rigid portion acts as a counterweight or support structure that compensates for the structural weakness introduced by thinning the semiconductor chip. This rigid portion prevents deformation and maintains structural integrity, allowing multiple chips to be stacked with reduced overall package thickness without compromising stability.

Inventive Principle:

Principle #8Anti-weight (Counterweight)

Data Source

PatentUS10510726B2Semiconductor device, method for manufacturing semiconductor device, and method for manufacturing semiconductor package

Publication Date: 2019.12.17 KK TOSHIBA

AI summary

A semiconductor device includes a base including interconnects, a first semiconductor chip including a first semiconductor element portion, and a second semiconductor chip including a second semiconductor element portion. The second semiconductor chip is electrically connected to the first semiconductor chip via at least one of the interconnects. The second semiconductor chip includes a first region, a first portion, and a second portion. The first region includes the second semiconductor element portion. The first portion is continuous with the first region. The second portion is continuous with the first region and is separated from the first portion in a second direction crossing a first direction. The first direction is from the base toward the first region. The second portion, the first portion, and at least a portion of the first semiconductor chip each is positioned between the base and the first region.