Semiconductor Package Shielding via Interposer Vias
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Solution Overview
Problem
Semiconductor packages for mobile devices face challenges in effectively suppressing electromagnetic wave leakage without increasing package size, while enhancing electrical and mechanical connection reliability between shielding layers and ground wiring.
Innovation Solution
A semiconductor package design featuring a conductive shielding layer covering the encapsulant and side surfaces of an interposer board, with vias connected to ground wiring and a cutting plane exposed to the side surface, enhancing electrical connection and reducing electromagnetic wave leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a shielding layer is provided along the outer surface of an encapsulant sealing a semiconductor chip mounted on an interposer board, then electromagnetic wave leakage is suppressed, but the electrical and mechanical connection reliability between the shielding layer and ground wiring needs enhancement
Solution Approach 1:
The via structure is extended from a simple vertical connection to include a cutting plane that exposes the via to the side surface of the interposer board. This dimensional extension allows the shielding layer to make contact with the via at multiple points (top surface and side surface), enhancing connection reliability without increasing package size.
Solution Approach 2:
The cutting plane of the via acts as an intermediary structure that facilitates reliable electrical and mechanical connection between the shielding layer and the ground wiring. By exposing the via through the side surface, it creates an additional contact interface that improves connection stability.
2Object-affected harmful factors
If vias connected to ground wiring are arranged at an outer peripheral side of the interposer board to suppress electromagnetic wave leakage from side surfaces, then shielding effectiveness is improved, but package size increases
Solution Approach 1:
Instead of expanding the package footprint to accommodate additional shielding structures, the invention utilizes the vertical dimension by creating a cutting plane that exposes the via to the side surface. This allows the shielding layer to effectively cover side surfaces without increasing the horizontal package dimensions.
Solution Approach 2:
The shielding layer is implemented as a thin conductive film that conforms to the contours of the encapsulant and interposer board side surfaces. This flexible approach allows effective shielding coverage without requiring bulky structures that would increase package size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively suppresses electromagnetic wave leakage from the side surfaces of the interposer board, maintaining reliable electrical and mechanical connections while preventing package size increase, achieving improved magnetic field shielding effectiveness.
Implementation Method 1
a conductive shielding layer provided to cover the encapsulant and at least part of a side surface of the interposer board
Implementation Method 2
The cutting plane of the via is electrically connected to the conductive shielding layer
Data Source
AI summary
According to an embodiment, a semiconductor package includes a semiconductor chip mounted on an interposer board, a encapsulant sealing the semiconductor chip, and a conductive shielding layer covering the encapsulant and at least part of a side surface of the interposer board. The interposer board has plural vias through an insulating substrate. A part of the plural vias has a cutting plane exposing to the side surface of the interposer board and cut in a thickness direction of the interposer board. The cutting plane of the via is electrically connected to the conductive shielding layer.