Semiconductor Package Shielding Wiring Structure EMI Reduction
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Solution Overview
Problem
The increasing size of display modules in mobile devices necessitates larger batteries, which in turn reduces the surface area available for printed circuit boards (PCBs), leading to challenges in mounting components and increased electromagnetic interference (EMI) due to the chip-on-board (COB) technique.
Innovation Solution
A semiconductor package with a shielding structure that includes a frame, through-hole, redistribution layer, semiconductor chip, encapsulant, and electrical connection metal members, featuring a shielding wiring structure and grounding electrical connection metal members to surround the through-hole and reduce EMI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the chip-on-board (COB) technique is used to mount components, then the surface area for mounting components is increased, but electromagnetic interference (EMI) among components is increased and electrical noise is increased due to large distance between semiconductor chip and passive components
Solution Approach 1:
The patent segments the grounding function by providing multiple grounding electrical connection metal members (first, second, and third grounding members) positioned at different locations and orientations. This segmentation allows each grounding member to effectively shield specific signal lines passing through different regions of the package, thereby reducing EMI while maintaining a compact structure that does not require increased surface area.
Solution Approach 2:
The patent applies local quality by positioning grounding members specifically at locations where EMI is most problematic. The first grounding member is positioned to shield signal lines in a first direction, the second grounding member shields signal lines in a second direction, and the third grounding member provides additional shielding. This localized approach to grounding effectively reduces EMI without requiring a uniform increase in surface area.
2Use of energy by moving object
If battery capacity is increased to meet display module size requirements, then energy storage is improved, but the surface area occupied by the battery increases, leading to reduced surface area for PCB and decreased surface area for mounting components
Solution Approach 1:
The patent transitions from a two-dimensional surface mounting approach to a three-dimensional vertical stacking approach. By positioning the semiconductor chip above the PCB and using vertical grounding members that extend through the package structure, the design utilizes the third dimension (height/thickness) to provide effective EMI shielding without requiring additional horizontal surface area. This allows battery capacity to be increased while maintaining sufficient surface area for component mounting.
3Object-affected harmful factors
If the number of grounding members is increased to improve EMI shielding, then electromagnetic interference (EMI) is reduced, but device complexity and manufacturing complexity are increased
Solution Approach 1:
The patent applies universality by designing grounding members that serve multiple functions simultaneously. Each grounding member provides both mechanical support and EMI shielding functionality. The grounding members are integrated into the package structure such that they also serve as mounting structures for the semiconductor chip and as electrical connection paths. This multi-functionality reduces the need for separate dedicated shielding structures, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent merges the grounding function with other structural elements of the package. The grounding members are combined with the encapsulant structure and the semiconductor chip mounting structure. By merging these functions into unified structures rather than adding separate shielding components, the patent effectively reduces EMI while limiting the increase in manufacturing complexity and device complexity.
Data Source
AI summary
A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.