Semiconductor Package Sidewall Structure for Shorter Lead Terminals
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Solution Overview
Problem
Existing semiconductor devices face challenges in efficiently forming semiconductor packages that allow for shorter lead terminals and reduced burrs, which affect manufacturing efficiency and product specifications with narrow pitch requirements.
Innovation Solution
The semiconductor device design incorporates a lead guide on side surfaces where lead terminals do not protrude, preventing burr formation and allowing for shorter lead terminals, while omitting the guide where terminals do protrude to accommodate narrow pitch specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a lead guide is provided on side surfaces to prevent burr formation, then manufacturing precision is improved, but device complexity increases and lead terminals cannot be shortened
Solution Approach 1:
The patent extracts the lead guide structure only from side surfaces where lead terminals do not protrude, while omitting it from side surfaces where terminals do protrude. This selective application reduces overall device complexity while maintaining burr prevention where needed, and allows lead terminals to be shortened on surfaces where guides are omitted.
Solution Approach 2:
The patent applies different structural characteristics to different side surfaces based on local requirements. Side surfaces with protruding lead terminals omit the lead guide to allow shorter terminals, while side surfaces without protruding terminals include the lead guide to prevent burr formation. This local differentiation resolves the contradiction between burr prevention and device complexity.
2Productivity
If lead terminals are shortened to improve productivity, then manufacturing efficiency is improved, but manufacturing precision deteriorates due to increased burr formation
Solution Approach 1:
The patent removes the lead guide structure from side surfaces where lead terminals protrude, enabling these terminals to be shortened for improved productivity. Meanwhile, the lead guide is retained on side surfaces where terminals do not protrude, preventing burr formation and maintaining manufacturing precision in those areas.
Solution Approach 2:
The patent implements local quality by applying the lead guide structure selectively: present on side surfaces where terminals do not protrude to prevent burrs, and absent on side surfaces where terminals protrude to allow shortening. This resolves the contradiction between productivity and manufacturing precision by addressing each side surface according to its specific requirements.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a lead frame, a semiconductor chip, a lead terminal and a package. The package includes an upper surface, a lower surface, and first and second side surfaces between the upper surface and the lower surface. The first side surface has a first surface, a second surface and a third surface. The first surface is continuous with the upper surface and is provided in an oblique direction with respect to the upper surface. The second surface is continuous with the first surface and is provided in a direction parallel to the upper surface. The third surface is continuous with the second surface and is provided in a direction orthogonal to the upper surface. The lead terminal protrudes from the first side surface and does not protrude from the second side surface.