Semiconductor Package Side-by-Side Modules Different Pitch Substrate
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Solution Overview
Problem
The challenge in semiconductor device packaging is to effectively integrate multiple device modules with different lead layouts within a limited space, enhancing compatibility and reducing the footprint of semiconductor device packages in portable electronic products.
Innovation Solution
The solution involves a substrate with different pitch spacings for connecting elements, allowing for the integration of multiple device modules with varying lead layouts, where the package body exposes these elements through specific openings to accommodate different types of external devices, enabling side-by-side stacking and improved compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If semiconductor device packages are stacked to form PoP assemblies to reduce footprint, then the area occupied by packages is reduced, but the complexity of integrating multiple device modules with different lead layouts increases
Solution Approach 1:
The substrate is divided into multiple regions with different pitch spacings (first pitch P1 and second pitch P2), allowing each region to accommodate different device modules with their specific lead layouts. This segmentation enables the integration of multiple devices with varying requirements within a single package without requiring separate packages for each device type.
Solution Approach 2:
The substrate serves multiple functions by providing both first connecting elements with pitch P1 and second connecting elements with pitch P2 on the same substrate. This multi-functional design allows the substrate to accommodate different device modules with different lead pitches, making the package universal for integrating various device types while maintaining a reduced footprint.
2Adaptability or versatility
If multiple device modules with different lead layouts are integrated in a single package, then compatibility with external devices is improved, but the device complexity increases
Solution Approach 1:
Different regions of the substrate are assigned different pitch spacings (P1 and P2) tailored to the specific requirements of different device modules. The first connecting elements have pitch P1 for compatibility with certain external devices, while the second connecting elements have pitch P2 for compatibility with other external devices. This local differentiation enhances overall compatibility without requiring a completely complex reconfiguration.
Solution Approach 2:
The substrate acts as an intermediary between device modules with different lead layouts and external devices. By providing multiple sets of connecting elements with different pitches on the substrate, it mediates the connection between devices with varying lead configurations and the external devices they need to interface with, simplifying the integration process.
3Adaptability or versatility
If connecting elements with different pitch spacings are used, then compatibility with external devices having different lead layouts is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The substrate is pre-configured with multiple sets of connecting elements at different pitch spacings (P1 and P2) during the manufacturing process. This preliminary arrangement of connecting elements with predetermined pitches allows for precise alignment and connection when device modules are mounted on the substrate, reducing the precision requirements during subsequent assembly steps.
Data Source
AI summary
A semiconductor device package including a substrate, a first device module, a second device module, and an package body. The first device module and the second device module are disposed side-by-side on a carrier surface of the substrate. The first device module includes first connecting elements provided with a first pitch. The second device module includes second connecting elements provided with a second pitch. The first pitch is different from the second pitch. The package body is disposed on the carrier surface and covers the first chip module and the second chip module. The package body includes first openings exposing the first connecting elements and second openings exposing the second connecting elements.