Semiconductor Package Stacking SMDs Under Die to Save Footprint

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Solution Overview

Problem

Semiconductor packages, such as BGA and LGA, are space-limited, preventing an increase in component integration despite miniaturization efforts, as the top metal layer has little space for additional components and embedding components in the substrate is costly in terms of manufacturing yield.

Innovation Solution

Positioning one or more surface mounted devices (SMDs) between a semiconductor die and a substrate, either on the surface or in a cavity, with the semiconductor die facing away from the SMDs and using supporting structures like solder balls or spacers to maintain the die's position, allowing for increased integration without expanding the package footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If surface mounted devices are integrated on the top layer of the package, then component integration increases, but the package footprint increases

Engineering Contradiction:
Improvecomponent integrationVSAvoidpackage footprint
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent transitions from two-dimensional surface mounting on the top layer to three-dimensional stacking by placing SMDs vertically between the substrate and semiconductor die. This vertical arrangement allows multiple components to occupy the same footprint area by utilizing the Z-dimension, thereby increasing component integration without expanding the package footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent embeds surface mounted devices within the vertical space between the substrate and the semiconductor die, effectively nesting components within the package volume rather than arranging them on the surface. This nesting approach maximizes space utilization and enables higher component density within the same footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If components are embedded in the substrate, then component integration increases, but manufacturing yield decreases

Engineering Contradiction:
Improvecomponent integrationVSAvoidmanufacturing yield
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent places surface mounted devices on the substrate before mounting the semiconductor die, allowing SMDs to be positioned in advance in the available vertical space. This preliminary action enables component integration without requiring complex post-assembly processes that would compromise manufacturing yield.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11810839B2Semiconductor package with die stacked on surface mounted devices
Publication Date: 2023.11.07 STMICROELECTRONICS SRL
  • US11810839B2 patent drawing
  • US11810839B2 patent drawing
  • US11810839B2 patent drawing

AI summary

One or more embodiments are directed to semiconductor packages and methods in which one or more electrical components are positioned between a semiconductor die and a surface of a substrate. In one embodiment, a semiconductor package includes a substrate having a first surface. One or more electrical components are electrically coupled to electrical contacts on the first surface of the substrate. A semiconductor die is positioned on the one or more electrical components, and the semiconductor die has an active surface that faces away from the substrate. An adhesive layer is on the first surface of the substrate and on the one or more electrical components, and the semiconductor die is spaced apart from the one or more electrical components by the adhesive layer. Wire bonds are provided that electrically couples the active surface of the semiconductor die to the substrate.