Semiconductor Package Structure Eliminating Solder Reflow Warpage

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Solution Overview

Problem

Conventional semiconductor flip-chip bonding methods face issues such as reduced shear strength due to brittle intermetallic compounds, poor joint quality, and yield reduction due to warpage of substrates, as well as adverse material interactions between solder, die pads, and circuit layers, leading to inefficient electrical transmission.

Innovation Solution

A package structure and manufacturing method that eliminates the need for solder by using a conductive structure extending through a circuit layer and dielectric layer to directly connect an electrical device, preventing the formation of intermetallic compounds and improving joint quality through alignment and direct material compatibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If solder is used to connect the die pad and circuit layer, then electrical connection is achieved, but brittle intermetallic compounds form reducing joint strength

Engineering Contradiction:
Improvejoint strengthVSAvoidshear strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent removes the solder layer from the bonding structure, eliminating the formation of brittle intermetallic compounds. The electrical device is bonded directly to the circuit layer without solder, thus extracting the harmful intermediate material that causes reliability issues.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a composite structure where the electrical device, circuit layer, and dielectric layer are directly bonded together. This composite approach eliminates the need for solder by creating a direct bond between dissimilar materials, improving overall joint strength and reliability.

Inventive Principle:
Principle #40Composite materials

2Reliability

If reflow process is used to melt solder, then bonding is achieved, but warpage causes poor contact between die pads and solder

Engineering Contradiction:
Improvejoint qualityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent eliminates the reflow process by removing solder from the bonding structure. Without solder requiring melting and solidification, the thermal cycling that causes warpage is avoided, ensuring consistent alignment and contact between die pads and circuit layer.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs alignment and bonding in a single step before warpage can occur. By bonding the electrical device directly to the circuit layer without subsequent reflow heating, the structure maintains its dimensional stability and alignment precision throughout the process.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If different materials are used for solder, die pad, and circuit layer, then bonding flexibility is improved, but electrical transmission is adversely influenced

Engineering Contradiction:
Improvematerial compatibilityVSAvoidelectrical transmission
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent removes the solder layer that caused material incompatibility issues. By eliminating this intermediate material with different electrical properties, direct electrical contact is established between the die pad and circuit layer, ensuring optimal electrical transmission.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a more homogeneous electrical path by removing the solder layer with different material properties. The direct bond between electrical device and circuit layer ensures consistent electrical characteristics throughout the connection, improving signal integrity and transmission reliability.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS11664339B2Package structure and method for manufacturing the same
Publication Date: 2023.05.30 ADVANCED SEMICON ENG INC
  • US11664339B2 patent drawing
  • US11664339B2 patent drawing
  • US11664339B2 patent drawing

AI summary

A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.