Semiconductor Package Heat Slug and Spacer Thermal Management

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Solution Overview

Problem

As consumption power increases due to higher processing rates and capacitance in semiconductor packages, reliability is affected, necessitating improved thermal management and structural integrity in semiconductor packages.

Innovation Solution

A semiconductor package with a system-in-package (SIP) structure is designed, featuring a substrate, lower and upper semiconductor chips, a molding layer, heat slug, and spacers with enhanced thermal conductivity materials, including silicon or metal, to manage heat and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If higher processing rates and capacitance are used to increase performance, then processing speed and capability are improved, but power consumption increases and reliability deteriorates

Engineering Contradiction:
Improveprocessing rateVSAvoidpackage reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces spacers with enhanced thermal conductivity as a parameter change to improve heat dissipation. By changing the thermal conductivity parameter of the packaging structure through the addition of high thermal conductivity spacers, the system can maintain higher processing rates while improving reliability through better thermal management

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The spacers act as intermediary elements between the semiconductor chips and the heat dissipation structure. These spacers with enhanced thermal conductivity serve as mediators to efficiently transfer heat away from the chips, resolving the contradiction between high power consumption and reliability by introducing a thermal management intermediary

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If more heat dissipation structures are added to improve thermal management, then heat dissipation is improved, but device complexity increases

Engineering Contradiction:
Improveheat dissipationVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

Rather than uniformly complexifying the entire package structure, the patent applies enhanced thermal conductivity spacers at specific critical locations where heat dissipation is most needed. This local quality approach improves heat dissipation effectiveness while minimizing the overall increase in device complexity by targeting only essential areas

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances heat dissipation and operational reliability by effectively transferring heat from the semiconductor chips to the heat slug through spacers, thereby addressing the reliability issues caused by increased power consumption.

Implementation Method 1

Upper spacers are disposed between the lower semiconductor chip and the heat slug. The upper spacers are disposed on the exposed top surfaces of the lower semiconductor chip... effectively transferring heat from the semiconductor chips to the heat slug through spacers

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9190338B2Semiconductor package having a heat slug and a spacer
Publication Date: 2015.11.17 SAMSUNG ELECTRONICS CO LTD
  • US9190338B2 patent drawing
  • US9190338B2 patent drawing
  • US9190338B2 patent drawing

AI summary

A semiconductor package includes a substrate. A lower semiconductor chip is disposed above the substrate. An upper semiconductor chip is disposed on the lower semiconductor chip. A top surface of the lower semiconductor chip at an end of the lower semiconductor chip is exposed. A heat slug disposed above the upper semiconductor chip. A molding layer is disposed between the substrate and the heat slug. The molding layer is configured to seal the lower semiconductor chip and the upper semiconductor chip. An upper spacer is disposed between the lower semiconductor chip and the heat slug. The upper spacer is disposed on the exposed surface of the lower semiconductor chip.