Semiconductor Package Structure with Stacked Chip and Interposer
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Solution Overview
Problem
New packaging technologies for semiconductor dies face manufacturing challenges, particularly in reducing production costs and package size while improving flexibility in die placement, die size, and die gap.
Innovation Solution
The method involves stacking chips directly on an interposer, reducing the number of production steps, and using encapsulating layers to enhance bonding and mechanical support, thereby reducing package size and production costs, and improving structural flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional multi-step packaging processes are used, then manufacturing precision and reliability are maintained, but production costs increase and production time extends
Solution Approach 1:
The patent combines multiple separate packaging operations into a single integrated process. Specifically, the carrier substrate serves multiple functions: it supports multiple semiconductor dies during processing, acts as a temporary mounting platform, and facilitates simultaneous handling of multiple components. This merging of functions reduces the number of discrete production steps and accelerates throughput.
Solution Approach 2:
The patent performs preliminary actions by pre-attaching semiconductor dies to the carrier substrate in an organized array before final packaging. This preliminary arrangement allows for efficient subsequent processing steps, such as simultaneous underfill application and encapsulation, rather than processing each die individually. The carrier substrate prepares the system in advance for high-volume processing.
2Area of stationary object
If package size is reduced to improve density, then space utilization improves, but manufacturing flexibility in die placement and sizing is reduced
Solution Approach 1:
The patent segments the packaging process into distinct phases: die attachment to carrier, underfill application, encapsulation, and carrier removal. This segmentation allows each phase to be optimized independently. The carrier substrate provides a large working area during assembly, enabling flexible die placement, while the final encapsulated package achieves compact dimensions. The process segmentation decouples the constraints of manufacturing flexibility from final package size.
Solution Approach 2:
The carrier substrate acts as an intermediary that enables flexible die placement during manufacturing while allowing the final package to achieve compact dimensions. The carrier provides a large, stable platform for arranging dies in various configurations, and the encapsulating material subsequently bonds the dies together into a compact final structure. The carrier mediates between the need for manufacturing flexibility and the goal of compact final packaging.
3Ease of manufacture
If production costs are reduced through simplified processes, then manufacturing efficiency improves, but manufacturing precision and bonding quality may deteriorate
Solution Approach 1:
The underfill material performs multiple functions simultaneously: it flows to fill gaps between dies and carrier, provides mechanical support, establishes electrical connections through conductive pathways, and creates capillary channels for subsequent encapsulant flow. This multi-functionality reduces the need for separate processing steps while maintaining bonding quality and structural integrity.
Solution Approach 2:
The patent utilizes capillary action parameters to control material flow and bonding. The underfill material's viscosity and surface tension are optimized to flow through narrow gaps via capillary forces, ensuring complete gap filling without requiring high-pressure injection equipment. Similarly, the encapsulant material's rheological properties are designed to flow through capillary channels formed by the underfill, achieving complete encapsulation with simplified processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces production time and costs, and enhances the flexibility of die placement and size, while maintaining effective electrical and thermal performance.
Implementation Method 1
filling a first encapsulating layer into a space between the chip stack and the semiconductor die
Data Source
AI summary
A method for forming a semiconductor package structure includes stacking chips to form a chip stack over an interposer. The method also includes disposing a semiconductor die over the interposer. The method also includes filling a first encapsulating layer between the chips and surrounding the chip stack and the semiconductor die. The method also includes forming a second encapsulating layer covering the chip stack and the semiconductor die. The first encapsulating layer fills the gap between the chip stack and the semiconductor die.