Semiconductor Package-on-Package Stacking for Size Reduction
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Solution Overview
Problem
Current package-on-package wafer level packaging technologies face challenges in size reduction, high-performance interconnects, and thermal management, which are not adequately addressed by existing methods.
Innovation Solution
The method involves a semiconductor manufacturing process using a carrier with a debond layer, adhesive layer, seed layer, and through interlayer vias, followed by die placement, molding, redistribution layer formation, connector creation, and polymeric cover film and dam structure printing and curing, enabling efficient packaging and interconnects while managing thermal issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional packaging methods are used, then manufacturing simplicity is maintained, but size reduction and thermal management are insufficient
Solution Approach 1:
The patent implements package-on-package stacking where multiple semiconductor packages are vertically integrated. The first package is formed on a carrier, then a second package is stacked on top of it, creating a nested three-dimensional structure that reduces overall footprint while maintaining functionality of individual packages
Solution Approach 2:
The patent transitions from conventional two-dimensional planar packaging to three-dimensional vertical packaging by stacking packages in the height direction. This dimensional change enables size reduction in the planar directions while adding complexity in the vertical integration process
2Reliability
If conventional interconnect methods are used, then manufacturing simplicity is maintained, but high-performance interconnects are not achieved
Solution Approach 1:
The patent divides the interconnect structure into multiple segments including through-interlayer vias, redistribution layers, and bonding pads distributed across different packaging layers. This segmentation enables high-performance interconnects by providing multiple dedicated pathways for signal and power transmission between stacked packages
Solution Approach 2:
The patent introduces redistribution layers as intermediary structures between bonding pads and through-interlayer vias. These intermediary layers facilitate complex routing and signal distribution, enabling high-performance interconnect functionality while managing the complexity through modular layer design
3Temperature
If conventional packaging structures are used, then manufacturing simplicity is maintained, but thermal management is insufficient
Solution Approach 1:
The patent introduces thermal interface materials as intermediary substances between the semiconductor die and the heat sink structure. These materials facilitate efficient heat transfer from the die through the packaging layers to the heat sink, enabling effective thermal management while maintaining relatively simple packaging geometry
Solution Approach 2:
The patent designs the heat sink structure to serve multiple functions: it acts as a thermal management component, a mechanical support structure, and a bonding interface for the packaging assembly. This multi-functionality enables effective heat dissipation without proportionally increasing structural complexity
4Reliability
If dicing is performed without protection, then productivity is maintained, but sawing debris causes electrical failures
Solution Approach 1:
The patent applies a protective coating to the packaging structure before the dicing process. This preliminary protective action prevents sawing debris from causing electrical failures during cutting, and the coating can be removed or remains as a protective layer, maintaining productivity while ensuring reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a robust, compact semiconductor package with improved thermal management and high-performance interconnects, enhancing product reliability and yield by preventing warpage and electrical failures from sawing debris.
Implementation Method 1
Each of the first, second and third curing units is operable to irradiate a light capable of curing the first and second materials
Data Source
AI summary
A printing module, printing method and system of forming a printed structure are provided. The printing module includes a first printing dispenser operable to dispense a first material, a second printing dispenser operable to dispense a second material, a first curing unit, a second curing unit and a third curing unit. The first, the second and the third curing units each is operable to irradiate a light capable of curing the first and second materials and are alternately arranged with the first and second printing dispensers along a line. The first and second printing dispensers and the first, second and third curing units are simultaneously movable along the line. During the second curing unit and one of the first curing unit and the third curing unit are operable to irradiate the light, the other of the first curing unit and the third curing unit is off.