Semiconductor Package Interconnect Structure for Stress-Resistant Bonding

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Solution Overview

Problem

Semiconductor devices and packages face durability issues due to external forces or stresses that can cause detachment or cracking in solder bonding members and underfill materials, leading to electrical connection and insulation problems.

Innovation Solution

A semiconductor device configuration featuring conductive members sealed with a sealing resin forming protrusions that cover the perimeter of their tips, which are inserted into through holes in a control substrate, connected by flexible wiring to improve insulation and prevent damage from external forces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If solder is used as bonding member to connect conductive member to electrode, then electrical connection is achieved, but external force or stress causes detachment or cracking reducing durability

Engineering Contradiction:
ImprovedurabilityVSAvoidbonding strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent changes the mechanical properties of the bonding member by using flexible wiring instead of rigid solder, allowing the bonding structure to accommodate external forces and stress through flexibility while maintaining electrical connection reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an underfill material as an intermediary substance between the semiconductor package and control substrate, which distributes and absorbs external forces, preventing stress concentration on the bonding member and reducing detachment or cracking risks

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If underfill material is used to cover conductive member, then insulation property is improved, but external force or stress causes detachment or cracking reducing durability

Engineering Contradiction:
Improveinsulation propertyVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent modifies the mechanical characteristics of the underfill material by selecting materials with appropriate flexibility and elasticity, enabling the insulation layer to maintain its insulating properties while resisting detachment or cracking under external stress

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures combining underfill material with flexible wiring and sealing resin, creating a multi-layer system where each material compensates for the weaknesses of others, improving both insulation and structural integrity under stress

Inventive Principle:
Principle #40Composite materials

3Reliability

If conductive member tip is exposed for connection, then electrical connection is enabled, but insulation property deteriorates

Engineering Contradiction:
Improveelectrical connectionVSAvoidinsulation property
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality differentiation by providing insulation coverage only at critical areas where conductive members interact with the control substrate, while leaving tip portions exposed for electrical connection, achieving both insulation and connectivity requirements

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses underfill material as an intermediary insulating layer that fills the space between exposed conductive member tips and the control substrate, providing insulation without preventing electrical connection through the exposed tips

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240072026A1Semiconductor device, method of manufacturing same, and semiconductor package
Publication Date: 2024.02.29 MITSUBISHI ELECTRIC CORP
  • US20240072026A1 patent drawing
  • US20240072026A1 patent drawing
  • US20240072026A1 patent drawing

AI summary

A semiconductor device according to the present disclosure includes: a semiconductor element; a plurality of conductive members each electrically connected to the semiconductor element and each extending upward; a sealing resin to seal the semiconductor element and the conductive member and to form a protrusion that covers a perimeter of a tip portion of each of the plurality of conductive members; a control substrate provided with a through hole into which the protrusion is inserted, the control substrate having a control electrode; and a flexible wiring to connect the control electrode and the tip portion of the conductive member to each other, the flexible wiring having flexibility. With such a configuration, a trouble due to external force or stress applied to the semiconductor device or the semiconductor package can be prevented and the semiconductor device or the semiconductor package having an excellent durability can be obtained.