Semiconductor Package Substrate With Outer Insulating Layer
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Solution Overview
Problem
Current semiconductor packages face challenges in preventing short circuits between connection terminals, achieving fine pitch connections, improving signal integrity, facilitating under-fill layer filling, and addressing warpage issues, particularly as the number of input/output terminals increases.
Innovation Solution
The semiconductor package design includes a substrate with an inner and outer insulating layer, a redistribution layer, a connection pad exposed through the outer insulating layer, and a ground electrode, where the connection pad is electrically connected to the redistribution layer, and the outer insulating layer covers the ground electrode, allowing for efficient fabrication and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of input/output terminals is increased, then the functionality and performance of the semiconductor package is improved, but the size of the semiconductor package increases
Solution Approach 1:
The patent transitions from a conventional planar substrate layout to a three-dimensional structure by forming connection pads that extend vertically through the substrate thickness. This vertical dimension allows multiple connection terminals to be stacked in the thickness direction, enabling increased I/O capacity without proportionally increasing the substrate footprint area.
Solution Approach 2:
The connection pads are nested within the substrate structure, with inner connection pads positioned at different vertical levels than outer connection pads. This nesting arrangement allows multiple connection terminals to occupy overlapping horizontal spaces at different depths, effectively increasing terminal density without expanding the overall package dimensions.
2Manufacturing precision
If connection terminals of fine pitch are provided, then the integration density is improved, but the risk of short circuit between terminals increases
Solution Approach 1:
By utilizing the vertical dimension through substrate thickness, the patent separates connection pads at different heights, providing natural insulation between finely-spaced terminals. This vertical separation maintains fine horizontal pitch while preventing short circuits through dielectric isolation in the thickness direction.
Solution Approach 2:
The patent applies different structural characteristics to different regions: inner connection pads are positioned at one vertical level while outer connection pads are positioned at another vertical level. This local differentiation in vertical positioning allows fine pitch in the horizontal direction while maintaining adequate isolation through vertical separation.
3Reliability
If the connection pad level is lower than the outer insulating layer surface, then short circuit prevention is improved, but the fabrication complexity increases
Solution Approach 1:
The connection pads are formed to extend through the entire substrate thickness before the outer insulating layer is applied. This preliminary formation of through-substrate pads simplifies subsequent processing, as the pads are already positioned at the correct depth and the insulating layer can be deposited uniformly over the substrate surface.
Solution Approach 2:
The patent controls the depth parameter of connection pads relative to the substrate thickness, ensuring pads extend fully through while the outer insulating layer provides the final surface level. This parameter control achieves short circuit prevention through proper depth positioning without requiring complex post-processing steps.
4Reliability
If the ground electrode is covered by the outer insulating layer, then signal integrity is improved, but the accessibility for connection decreases
Solution Approach 1:
The ground electrode is positioned within the substrate thickness rather than at the surface, covered by the outer insulating layer. This vertical placement provides electromagnetic shielding for signal paths while the insulating layer thickness can be controlled to maintain adequate accessibility for bonding and connection processes.
Data Source
AI summary
A semiconductor package may include a substrate and a semiconductor chip on the substrate. The substrate may include an inner insulating layer, a redistribution layer in the inner insulating layer, an outer insulating layer on the inner insulating layer, a connection pad provided in the outer insulating layer and electrically connected to the redistribution layer, and a ground electrode in the outer insulating layer. A top surface of the connection pad may be exposed by a top surface of the outer insulating layer, and a level of the top surface of the connection pad may be lower than a level of the top surface of the outer insulating layer. A level of a bottom surface of the ground electrode may be higher than a level of a top surface of the redistribution layer, and the outer insulating layer covers a top surface of the ground electrode.