Semiconductor Package Substrate Removal and Routing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor devices lack efficient methods for removing substrates in low pin count applications, such as MEMS devices, and require encapsulation molding compounds for both protection and routing traces, which is not effectively addressed in existing technologies.

Innovation Solution

A semiconductor die is attached to a non-functional low-cost substrate, with a redistribution layer and electrically-conductive formations created on the substrate's walls to facilitate routing and connections, allowing for secondary die stacking and thermal dissipation, using ink printing or laser direct structuring for conductive paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a substrate is used for supporting semiconductor dice during assembly, then the dice can be handled and processed, but the substrate adds cost and complexity for low pin count applications

Engineering Contradiction:
Improveassembly processVSAvoidsubstrate structure
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts and removes the substrate after the semiconductor dice are attached and processed. The molding compound is formed to expose the dice and pads, allowing the substrate to be discarded, thereby eliminating substrate-related cost and complexity for low pin count applications while maintaining ease of manufacture during the assembly process

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate is treated as a temporary, disposable component used only during the assembly process. A low-cost substrate is employed for mounting the dice, and after the molding compound is formed and connections are established, the substrate is removed, avoiding the need for permanent, complex substrate structures

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Device complexity

If the encapsulation molding compound is used for both protection and routing traces, then the device structure is simplified, but existing technologies do not effectively address this dual function

Engineering Contradiction:
ImprovestructureVSAvoidrouting functionality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The molding compound is designed to perform multiple functions simultaneously: it provides mechanical protection and encapsulation for the semiconductor dice while also serving as the medium for creating conductive routing traces. The recessed portion in the molding compound allows conductive material to be deposited, forming functional traces that route signals from pads to external connections, thereby simplifying the overall device structure

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the protection function and routing function into a single component - the molding compound. By forming a recessed portion in the molding compound and depositing conductive material within it, the routing traces are integrated directly into the protective encapsulation structure, eliminating the need for separate routing layers or substrates

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If a step-wise arrangement is created on the walls of the cavity, then die and pads can be left exposed for routing, but the manufacturing process becomes more complex

Engineering Contradiction:
Improverouting flexibilityVSAvoidmolding process
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The step-wise arrangement or recessed portion is pre-formed in the molding compound during the molding process itself, before subsequent conductive material deposition. This preliminary structuring of the molding compound creates the necessary geometry for exposing die and pads while providing defined regions for trace formation, enabling routing flexibility without requiring complex post-processing steps

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables thinner, cost-effective semiconductor packages with improved thermal dissipation and flexible routing options, allowing for both substrate removal and efficient assembly processes.

Implementation Method 1

routing from die pads (e.g., from a redistribution layer—RDL on top to the die) to lands on the external molding area can be created, e.g., by ink printing

Methodology Applied
Scientific EffectInk printing: Deposition (physical)

Implementation Method 2

in the case LDS (Laser Direct Structuring) materials, to replace ink printing with laser ablation plus plating

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 3

laser ablation plus plating

Methodology Applied
Scientific EffectPlating: Electroplating

Implementation Method 4

Such a substrate may include a heat conductive foil (e.g., copper or aluminum) to provide thermal dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10879143B2Method of manufacturing semiconductor devices, corresponding device and circuit
Publication Date: 2020.12.29 STMICROELECTRONICS SRL
  • US10879143B2 patent drawing
  • US10879143B2 patent drawing
  • US10879143B2 patent drawing

AI summary

A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.