Semiconductor Package Supporting Member Warpage Control

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Solution Overview

Problem

Miniaturized semiconductor packages experience warpage due to heat, which existing technologies fail to adequately address in package-on-package configurations.

Innovation Solution

Incorporating a lower supporting member with a different coefficient of thermal expansion, bonded to a supporting pad, to reduce warpage in semiconductor packages by providing thermal expansion control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If a miniaturized semiconductor package structure is used, then the package size is reduced and integration is improved, but warpage occurs due to heat expansion

Engineering Contradiction:
Improvepackage sizeVSAvoidwarpage
Core Design Contradiction:
Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The patent introduces a supporting member with a specific coefficient of thermal expansion that differs from the substrate material. By changing the material parameter (thermal expansion coefficient) of the supporting member, the patent compensates for thermal warpage in the miniaturized package while maintaining the reduced package size.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure consisting of the substrate and a supporting member made of different materials with different thermal expansion coefficients. This composite construction allows the package to maintain mechanical stability and resist warpage while keeping the overall package size miniaturized.

Inventive Principle:
Principle #40Composite materials

2Productivity

If package-on-package technology is implemented, then integration density is improved, but thermal warpage control becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidthermal warpage control
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent modifies the thermal expansion parameters by introducing a supporting member with a controlled coefficient of thermal expansion. This parameter change helps maintain dimensional stability in package-on-package configurations where thermal warpage control becomes increasingly difficult with higher integration density.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The supporting member acts as a counterbalancing element that compensates for thermal warpage forces. By positioning the supporting member with appropriate material properties, the patent creates a counteracting effect that balances the thermal expansion stresses in multi-layer package structures.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively mitigates warpage in semiconductor packages by using a supporting member with a varying thermal expansion coefficient, enhancing thermal management and stability.

Implementation Method 1

A lower supporting member is disposed on the lower surface of the lower substrate... The at least one supporting member includes a material having a higher or lower coefficient of thermal expansion than other portions of the semiconductor package to reduce warpage of the semiconductor package

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11676949B2Semiconductor packages having supporting members
Publication Date: 2023.06.13 SAMSUNG ELECTRONICS CO LTD
  • US11676949B2 patent drawing
  • US11676949B2 patent drawing
  • US11676949B2 patent drawing

AI summary

A semiconductor package includes a lower substrate including a lower passivation layer, a lower pad, element pads and a supporting pad that are disposed on a lower surface of the lower substrate. The lower passivation layer partially covers the lower pad, the element pads and the supporting pad. A semiconductor chip is disposed on an upper surface of the lower substrate. An upper substrate is disposed on the semiconductor chip and is connected to the lower substrate. An encapsulator is disposed between the lower substrate and the upper substrate. An element is disposed on the lower surface of the lower substrate. The element is bonded to the element pads. A lower supporting member is disposed on the lower surface of the lower substrate. A supporting bonding member bonds the lower supporting member to the supporting pad.