Semiconductor Package Double-Side Cooling Surface Mounting

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Solution Overview

Problem

Existing semiconductor packaging methods face challenges with insufficient heat dissipation, high manufacturing complexity, and electromagnetic interference (EMI) due to inadequate heat dissipation and parasitic inductance, which affect the performance and reliability of power modules, especially in high current applications.

Innovation Solution

A semiconductor package structure with double-side cooling capability is developed, utilizing a surface mounting method that includes a conductive frame with a carrier board and metal member to form a receiving area for the chip, connected to circuit boards through pads, and a closed-loop metal ring to prevent EMI, eliminating the need for wire bonding and simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding process is used to electrically connect power chips, then electrical connection is achieved, but heat dissipation ability deteriorates and parasitic inductance increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidheat dissipation ability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent extracts and removes the wire bonding process from the power module structure, replacing it with a direct surface mounting connection method where power chips are mounted directly on the circuit board without intermediate wire bonds, thereby eliminating the heat dissipation bottleneck and parasitic inductance source

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical wire bonding system with a direct electrical and thermal connection system through surface mounting, where the chip electrodes make direct contact with the circuit board pads, substituting the wire-mediated electrical connection with a direct contact mechanism that provides both electrical conductivity and thermal conduction pathways

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If wire bonding process is used to electrically connect power chips, then electrical connection is achieved, but electromagnetic interference increases due to parasitic inductance

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidelectromagnetic interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the wire bonding process from the power module structure, replacing it with a direct surface mounting connection method where power chips are mounted directly on the circuit board without intermediate wire bonds, thereby eliminating the heat dissipation bottleneck and parasitic inductance source

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical wire bonding system with a direct electrical and thermal connection system through surface mounting, where the chip electrodes make direct contact with the circuit board pads, substituting the wire-mediated electrical connection with a direct contact mechanism that provides both electrical conductivity and thermal conduction pathways

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If conventional die attach and wire bonding processes are combined, then power module assembly is achieved, but manufacturing complexity increases and yield decreases

Engineering Contradiction:
Improvepower module assembly reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the die attach process and wire bonding process into a single surface mounting operation, where the power chips are directly mounted onto the circuit board in one step, eliminating the need for separate wire bonding工序 and simplifying the manufacturing flow

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts and removes the wire bonding process from the power module structure, replacing it with a direct surface mounting connection method where power chips are mounted directly on the circuit board without intermediate wire bonds, thereby eliminating the heat dissipation bottleneck and parasitic inductance source

Inventive Principle:
Principle #2Taking out (Extraction)

4Temperature

If single-side cooling is used, then heat dissipation is provided, but heat dissipation efficiency is insufficient for high current applications

Engineering Contradiction:
Improveheat dissipation capabilityVSAvoidheat dissipation efficiency
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The patent transitions from single-side cooling to double-side cooling by adding a second circuit board on the opposite side of the power chips, creating symmetrical thermal pathways in both directions, effectively utilizing both surfaces of the chip for heat dissipation and doubling the heat dissipation capacity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides effective double-side cooling, reduces heat resistance, prevents EMI, simplifies manufacturing, and enhances reliability and operation frequency, allowing for higher power density and lower parasitic inductance, making it suitable for high current applications.

Implementation Method 1

a first side of the first chip is connected to the first carrier board; providing a first circuit board to engage with the first surface mounting element, in which a second side of the first chip and the first metal member are connected to the first circuit board through a first pad and a second pad respectively

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

a closed-loop metal ring to prevent EMI

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS10297522B2Semiconductor package structure and manufacturing method thereof
Publication Date: 2019.05.21 NIKO SEMICON
  • US10297522B2 patent drawing
  • US10297522B2 patent drawing
  • US10297522B2 patent drawing

AI summary

A semiconductor package structure and manufacturing method thereof are provided. Firstly, a first surface mounting unit, a first printed circuit board, and a second printed circuit board are provided. The first surface mounting unit includes a first chip and a first conductive frame, and the first conductive frame has a first carrier board and a first metal member connected to the first carrier board. A first side of the first chip is electrically connected to the first carrier board of the first conductive frame. A second side of the first chip and the first metal member are connected to the first circuit board by a first pad and a second pad respectively. The second circuit board is connected to the first carrier board and hence, the first surface mounting unit is located between the first circuit board and the second circuit board.