Semiconductor Package Layout for Low-Inductance Switching Paths
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Solution Overview
Problem
Parasitic inductance in semiconductor devices increases due to the lengthened conductor paths between electrodes, hindering high-speed switching in applications like inverter circuits and DC-DC converter circuits.
Innovation Solution
A semiconductor device configuration with first and second die pads and switching elements, connected by a connecting member within an encapsulation resin, reduces inductance by shortening the electric path between electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If semiconductor devices are spaced apart on a mounting substrate to provide heat dissipation space, then heat dissipation is improved, but the conductor length increases and parasitic inductance increases
Solution Approach 1:
The patent merges two separate semiconductor devices into a single integrated device by mounting both switching elements on the same substrate. This integration eliminates the need for external wiring conductors between devices, thereby reducing parasitic inductance while maintaining adequate heat dissipation space through internal layout optimization
2Temperature
If the distance between semiconductor devices is increased to reduce heat density, then heat dissipation is improved, but the electric path length increases and parasitic inductance increases
Solution Approach 1:
By combining multiple switching elements within a single device package on a common substrate, the patent achieves both goals: heat is dissipated across a larger total area within the package, and the electric path length is minimized since all connections are made through short internal bonds rather than long external wires
Solution Approach 2:
The patent utilizes three-dimensional spatial arrangement within the package, stacking or arranging switching elements and their connections in multiple layers and directions. This allows heat dissipation across multiple dimensions while keeping electrical connection paths short through vertical or diagonal routing
Data Source
AI summary
A semiconductor device includes a first die pad having a main surface, a second die pad having a second main surface, a first switching element connected to the first main surface, a second switching element connected to the second main surface, a first connecting member connecting the first main surface electrode of the first switching element to the second die pad, an encapsulation resin encapsulating the first switching element, the second switching element, the first die pad, the second die pad, and the first connecting member, and leads projecting out of one of the resin side surfaces of the encapsulation resin.