Semiconductor Package Redistribution Structure for Reliable Terminal Contact

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Solution Overview

Problem

Existing semiconductor packages face reliability issues due to non-exposure of redistribution pattern bottom surfaces, leading to potential contact failure between conductive terminals and external circuits, which can result in reduced package reliability.

Innovation Solution

The semiconductor package incorporates insulative patterns in recess regions of redistribution patterns, reducing the depth of recessed regions and preventing non-exposure of redistribution pattern bottom surfaces, thereby ensuring reliable electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redistribution patterns are formed with deep recess regions to enable electrical connections, then electrical connectivity is achieved, but the bottom surfaces of redistribution patterns may not be exposed leading to contact failure

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidredistribution pattern bottom surface exposure
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An insulative pattern is introduced as an intermediary element within the recess region of the redistribution pattern. This insulative pattern fills the recess region and has a top surface that is substantially coplanar with the top surface of the redistribution pattern, thereby exposing the bottom surface of the redistribution pattern while maintaining electrical connection reliability. The insulative pattern acts as a mediator that resolves the conflict between achieving electrical connectivity and ensuring bottom surface exposure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If deep recess regions are formed in redistribution patterns to accommodate via structures, then electrical pathways are established, but contact failure occurs due to non-exposure of redistribution pattern bottom surfaces

Engineering Contradiction:
Improvevia structure formationVSAvoidcontact reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The insulative pattern serves as an intermediary structure that fills the recess region formed in the redistribution pattern. By placing this insulative material in the recess region and forming its top surface substantially coplanar with the top surface of the redistribution pattern, the solution enables via structures to be formed while simultaneously exposing the bottom surface of the redistribution pattern, thus preventing contact failure and improving contact reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the top surface of the insulative pattern is formed substantially coplanar with the top surface of the redistribution pattern, then bottom surface exposure is achieved, but additional manufacturing steps are required

Engineering Contradiction:
Improvebottom surface exposure precisionVSAvoidinsulative pattern formation process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The insulative pattern is formed in advance within the recess region of the redistribution pattern, with its top surface being substantially coplanar with the top surface of the redistribution pattern. This preliminary action of forming the insulative pattern with the correct top surface elevation ensures that the bottom surface of the redistribution pattern is exposed, while the coplanar configuration allows subsequent processing steps to proceed without additional complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11862596B2Semiconductor package
Publication Date: 2024.01.02 SAMSUNG ELECTRONICS CO LTD
  • US11862596B2 patent drawing
  • US11862596B2 patent drawing
  • US11862596B2 patent drawing

AI summary

Disclosed is a semiconductor package comprising a redistribution substrate, a semiconductor chip on the redistribution substrate and including a chip pad electrically connected to the redistribution substrate, and a conductive terminal on the redistribution substrate. The redistribution substrate includes a first dielectric layer, a first redistribution pattern, a second dielectric layer, a second redistribution pattern, and a first insulative pattern. The first redistribution pattern electrically connects the chip pad and the second redistribution pattern. The first insulative pattern has a first surface in contact with the first redistribution pattern and a second surface in contact with the second redistribution pattern. The second surface is opposite to the first surface. A width at the first surface of the first insulative pattern is the same as or greater than a width at the second surface of the first insulative pattern.