Semiconductor Package Test Terminal Structure for Accurate Chip Probing
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Solution Overview
Problem
Existing semiconductor packages face challenges in efficiently testing semiconductor devices due to limitations in connecting structures, which affect the accuracy and reliability of electrical characteristic tests.
Innovation Solution
A semiconductor package with a connecting structure that includes a substrate with upper and lower pads, a semiconductor chip with a chip pad, a connecting structure with a connecting pad electrically connected to the upper pad, an encapsulant covering the components, and a test terminal extending through the encapsulant, which electrically interconnects the semiconductor chip and the test terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional connecting structure is used in semiconductor packages, then the package structure can be formed, but the test accuracy and reliability are reduced due to interference from other packages or interposers
Solution Approach 1:
The connecting structure is segmented into distinct functional zones: a first connecting portion that electrically connects the chip pad to an upper pad on the substrate, and a second connecting portion that extends from the upper pad to the test terminal. This segmentation isolates the test signal path from interfering elements in package-on-package structures, improving both test accuracy and connection reliability.
Solution Approach 2:
The upper pad on the substrate serves as an intermediary element between the chip pad and the test terminal. It provides a dedicated connection point that mediates the electrical signal transmission, separating the test path from other package interconnections and reducing interference from adjacent packages or interposers.
2Measurement precision
If existing connecting structures are used, then the semiconductor chip can be connected to the substrate, but interference from other packages or interposers affects test accuracy
Solution Approach 1:
The connecting structure divides the electrical connection into separate segments: one segment connecting the chip pad to the upper pad, and another segment connecting the upper pad to the test terminal. This segmentation creates an isolated test signal path that is shielded from interference by other packages or interposers in package-on-package configurations.
Solution Approach 2:
The test terminal is extracted and extended through the encapsulant to protrude upwardly, separating the test access point from the underlying package structure. This extraction allows the test signal to be applied directly to the connecting structure without passing through interfering elements in other packages or interposers.
3Measurement precision
If the test terminal is embedded in the encapsulant, then the package is compact, but direct electrical connection for accurate testing is not achieved
Solution Approach 1:
The test terminal is extracted from the encapsulant interior and extended through it to protrude upwardly. This extraction creates a direct electrical connection path from the external test environment to the connecting structure, enabling accurate electrical testing while maintaining a compact package footprint by utilizing the existing encapsulant space.
Data Source
AI summary
A semiconductor package includes a substrate including an upper pad at a top surface of the substrate, a semiconductor chip on the substrate and including a chip pad at a top surface of the semiconductor chip, a connecting structure on the semiconductor chip and including a connecting pad at a top surface of the connecting structure and electrically connected to the upper pad, an encapsulant covering the substrate, the semiconductor chip, and the connecting structure, and a test terminal on the connecting structure and extending through the encapsulant. The connecting structure electrically interconnects the semiconductor chip and the test terminal.