Semiconductor Package Interconnects for Thermal Stress Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The coefficient of thermal expansion mismatch between various materials in semiconductor die packaging leads to stress-induced delamination, potentially damaging the semiconductor die during manufacturing or use.
Innovation Solution
The use of a carrier substrate with interconnect structures and a universal interconnect structure embedded in an encapsulant, along with copper-to-copper bonding or solder bonding, to minimize thermal stress and ensure reliable connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional solder bump packaging is used with multiple materials (under-bump metallization, dielectric materials, metallization materials, etch stop materials, barrier layer materials), then electrical connection between semiconductor die and external device is achieved, but coefficient of thermal expansion mismatch causes stress and delamination at elevated temperatures
Solution Approach 1:
The patent applies homogeneity by using copper-to-copper bonding where identical copper materials are bonded together, eliminating the coefficient of thermal expansion mismatch between dissimilar materials. This creates a homogeneous interface that expands uniformly during thermal cycling, preventing stress-induced delamination while maintaining reliable electrical connection.
Solution Approach 2:
The patent changes the bonding temperature parameter by using lower bonding temperatures in copper-to-copper bonding processes compared to traditional high-temperature solder reflow. This parameter change reduces the thermal load on the structure, minimizing thermal stress accumulation and preventing delamination of temperature-sensitive low-k dielectric layers while still achieving reliable copper-to-copper bonding.
2Reliability
If high temperature reflow is used to bond solder bumps, then electrical connection is established, but thermal stress damages temperature-sensitive materials like low-k dielectric layers
Solution Approach 1:
The patent changes the bonding temperature parameter by implementing copper-to-copper bonding at lower temperatures compared to traditional solder reflow processes. This parameter change enables reliable bonding while reducing thermal stress on temperature-sensitive materials such as low-k dielectric layers, preventing delamination and damage during the bonding process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces stress between materials, preventing delamination and enhancing the reliability of semiconductor devices by using equivalent coefficients of thermal expansion and lower bonding temperatures, thus improving board level reliability.
Implementation Method 1
Each one of these different materials may have a unique coefficient of thermal expansion that is different from the other materials. This type of coefficient of thermal expansion mismatch causes each one of the materials to expand a different distance when the semiconductor die is heated
Implementation Method 2
The solder bumps may be formed by initially forming a layer of under-bump metallization in contact with a conductive portion of the semiconductor die and then placing solder onto the under-bump metallization
Data Source
AI summary
A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.