Semiconductor Package Thermal Via Structure for Heat Dissipation

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Solution Overview

Problem

The semiconductor industry faces challenges with high heat density and poor thermal dissipation in semiconductor packages, leading to electromigration and reliability issues as ICs become smaller and more complex.

Innovation Solution

A semiconductor package design incorporating thermal-dissipating vias and patterns, along with conductive terminals and thermal-dissipating bumps, to enhance heat dissipation and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If IC scaling is pursued to increase functional density, then production efficiency and cost are improved, but heat density increases and thermal dissipation performance deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidheat density
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent introduces thermal-dissipating vias that extend vertically through multiple redistribution structures and die layers, transforming heat dissipation from a two-dimensional surface problem to a three-dimensional volume problem. This vertical thermal pathways approach allows heat to be conducted away from hot spots through the depth of the package, resolving the contradiction between increased functional density (horizontal scaling) and thermal dissipation (vertical heat extraction).

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs thermal-dissipating vias filled with thermally conductive material as intermediary structures between the semiconductor die and the external environment. These vias act as thermal bridges that conduct heat from the high-density circuit regions through the package substrate to heat sinks or external cooling structures, enabling effective thermal management despite increased functional density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If IC scaling is pursued to increase functional density, then production efficiency and cost are improved, but thermal dissipation performance deteriorates

Engineering Contradiction:
Improveproduction efficiencyVSAvoidthermal dissipation performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces thermal-dissipating vias that extend vertically through multiple redistribution structures and die layers, transforming heat dissipation from a two-dimensional surface problem to a three-dimensional volume problem. This vertical thermal pathways approach allows heat to be conducted away from hot spots through the depth of the package, resolving the contradiction between increased functional density (horizontal scaling) and thermal dissipation (vertical heat extraction).

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs thermal-dissipating vias filled with thermally conductive material as intermediary structures between the semiconductor die and the external environment. These vias act as thermal bridges that conduct heat from the high-density circuit regions through the package substrate to heat sinks or external cooling structures, enabling effective thermal management despite increased functional density.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If thermal-dissipating vias and patterns are added to improve heat dissipation, then thermal dissipation performance is improved, but device complexity increases

Engineering Contradiction:
Improvethermal dissipation performanceVSAvoidpackage structure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent integrates thermal-dissipating vias into the existing redistribution structure fabrication process, where the same via structures serve dual purposes: electrical connection (signal/power transmission) and thermal management (heat conduction). This multi-functionality approach allows thermal dissipation improvement without proportionally increasing device complexity, as the thermal vias share the same structural and fabrication framework as the electrical interconnects.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines thermal-dissipating vias with electrical redistribution vias into a unified via structure. By merging thermal management functions with existing electrical interconnect structures, the patent avoids creating separate, additional thermal pathways that would increase complexity. Instead, the same via structures perform both electrical and thermal functions simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively addresses thermal dissipation issues, reducing electromigration and enhancing the reliability of semiconductor packages by providing efficient heat dissipation pathways.

Implementation Method 1

the thermal-dissipating feature is embedded in the dielectric layer of the third redistribution structure... and the thermal-dissipating feature is thermally coupled to a back surface of the second die

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250309202A1Semiconductor package and manufacturing method thereof
Publication Date: 2025.10.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250309202A1 patent drawing
  • US20250309202A1 patent drawing
  • US20250309202A1 patent drawing

AI summary

A semiconductor package includes an encapsulated die, a first redistribution structure disposed on and electrically coupled to a front side of the encapsulated die, a second redistribution structure disposed on a back side of the encapsulated die and electrically coupled to the first redistribution structure, and a thermal-dissipating structure disposed in the second redistribution structure and thermally coupled to the encapsulated die. The second redistribution structure includes a dielectric layer including a first level and an overlying second level, a first conductive pattern disposed in the first level of the dielectric layer, and a second conductive pattern disposed on the first conductive pattern and in the second level of the dielectric layer. The thermal-dissipating structure includes a first feature disposed in the first level of the dielectric layer and a second feature disposed on the first feature and in the second level of the dielectric layer.