Power Semiconductor Package With Thinned Metallic Plate Border

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Solution Overview

Problem

The high thermomechanical stress caused by the mismatch in thermal expansion coefficients between metallic plates and silicon carbide power semiconductor chips limits the lifetime of power semiconductor modules, especially during thermal cycling, and thin metallic top plates can be difficult to handle and may cause damage during wire bonding.

Innovation Solution

A power semiconductor module design featuring a metallic plate with a thinner border and a thicker central part, where the border has reduced metal material per area, either through machining or etching, to minimize thermomechanical stress and improve wire bonding stability, and the module includes a substrate with metallization layers for electrical interconnections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a metallic plate is used to bond to the power semiconductor chip, then electrical interconnection is provided, but thermomechanical stress degrades the bond layer and chip metallization, limiting lifetime

Engineering Contradiction:
Improvebond interface reliabilityVSAvoidmodule lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The metallic plate is designed with non-uniform thickness: a thicker central part (first thickness) bonded to the chip metallization and a thinner border (second thickness). This local quality variation reduces thermomechanical stress at the bond interface during thermal cycling while maintaining sufficient thickness in the central area for reliable electrical interconnection and wire bonding.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thickness parameter of the metallic plate is changed across different regions. The central part has a first thickness optimized for electrical connection, while the border has a second thickness (smaller than the first) optimized for stress reduction. This parameter gradient resolves the contradiction between connection reliability and thermal stress resistance.

Inventive Principle:
Principle #35Parameter changes

2Duration of action of stationary object

If the metallic plate is made thinner to reduce thermomechanical stress, then cycling lifetime is maximized, but wire bonding process suffers from damaged chip topside structures and handling difficulties

Engineering Contradiction:
Improvecycling lifetimeVSAvoidwire bonding reliability
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The metallic plate implements local quality differentiation with a thicker central part for wire bonding and a thinner border for stress reduction. The thicker central region provides sufficient mechanical support and electrical conductivity for reliable wire bonding, while the thinner border minimizes thermomechanical stress during thermal cycling.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The metallic plate is segmented into two functional zones: a central bonding area with greater thickness for electrical interconnection and a peripheral border with reduced thickness for stress management. This segmentation allows each zone to optimize its thickness for its specific function, resolving the contradiction between bonding reliability and cycling lifetime.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the reliability and cycling lifetime of the topside connection, allowing for thicker wire bonds or metallic bands, thereby increasing current capability and process stability while reducing thermomechanical stress.

Implementation Method 1

due to the mismatch of the coefficient of thermal expansion between the metallic plate and the power semiconductor chip, there may be a considerable stress exerted on the bond interface between the power semiconductor chip and the metallic plate during active or passive thermal cycling

Methodology Applied
Scientific EffectThermal expansion mismatch: Thermal Expansion

Data Source

PatentUS11538734B2Power semiconductor package with highly reliable chip topside
Publication Date: 2022.12.27 HITACHI ENERGY LTD
  • US11538734B2 patent drawing
  • US11538734B2 patent drawing
  • US11538734B2 patent drawing

AI summary

A power semiconductor module includes a substrate with a metallization layer and a power semiconductor chip bonded to the metallization layer of the substrate. A metallic plate has a first surface bonded to a surface of the power semiconductor chip opposite to the substrate. The metallic plate has a central part and a border that are both bonded to the power semiconductor chip. The border of the metallic plate is structured in such a way that the metallic plate has less metal material per volume at the border as compared to the central part of the metallic plate. Metallic interconnection elements are bonded to a second surface of the metallic plate at the central part.