Power Semiconductor Package Layout With Through-Hole Inductance Reduction

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Solution Overview

Problem

Existing power semiconductor devices face challenges in reducing wiring inductance and improving the positioning of lead packages and substrates due to the need for bypass wiring, which increases inductance and complicates the manufacturing process.

Innovation Solution

A power semiconductor device configuration that includes a circuit body with conductor parts, a substrate with through holes, and a sealing material, where protrusions on the substrate and lead frames are connected to reduce inductance and improve positioning by shortening wiring length and offsetting magnetic fields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If bypass wiring is used to connect the lead package and substrate, then the wiring can be routed around obstacles, but the wiring length increases causing increased inductance

Engineering Contradiction:
Improvewiring routing flexibilityVSAvoidwiring inductance
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from planar surface wiring to three-dimensional through-hole wiring. The conductor parts extend vertically through the substrate thickness, utilizing the Z-dimension to create direct connections between opposite surfaces. This dimensional change eliminates the need for long bypass wiring while maintaining routing flexibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges the lead package positioning function with the electrical connection function. The protrusions on the substrate serve dual purposes: they provide mechanical positioning for the circuit body and simultaneously serve as electrical connection paths, eliminating the need for separate bypass wiring.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If the lead package is positioned on the substrate surface, then assembly is simplified, but positioning precision and electrical connection reliability deteriorate

Engineering Contradiction:
Improveassembly simplicityVSAvoidpositioning precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The circuit body is inserted into and nested within the through-hole of the substrate. The protrusions are nested within the through-hole space, creating a compact integrated structure. This nesting arrangement provides precise positioning while maintaining assembly simplicity.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The substrate is segmented to create a through-hole with protrusions that extend into the hole. This segmentation allows the circuit body to be inserted and precisely positioned within the through-hole, improving positioning accuracy while keeping the assembly process simple.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If surface wiring is used to connect electrical components, then the wiring path is flexible, but the wiring length increases causing increased inductance and noise

Engineering Contradiction:
Improvewiring path flexibilityVSAvoidelectromagnetic noise
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent moves electrical connections from the two-dimensional surface plane to the three-dimensional through-hole space. Conductor parts extend vertically through the substrate, creating short direct connection paths that reduce inductance and electromagnetic noise while maintaining routing flexibility through the third dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the electrical connection path from the surface wiring layer and relocates it to the through-hole interior. This extraction creates isolated, short connection paths that are shielded from external electromagnetic interference and generate minimal noise.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12513826B2Power semiconductor device
Publication Date: 2025.12.30 ASTEMO LTD
  • US12513826B2 patent drawing
  • US12513826B2 patent drawing
  • US12513826B2 patent drawing

AI summary

A power semiconductor device includes: a circuit body having a pair of conductor parts and a power semiconductor element sandwiched between the pair of conductor parts; a substrate in which a through hole is formed; and a sealing material that seals at least a part of each of the circuit body and the substrate, in which the circuit body is inserted into the through hole and has first and second exposed surfaces exposed from the sealing material, and the substrate has, in the through hole, a first protrusion and a second protrusion that protrude toward a center of the through hole and are connected to the circuit body, the first protrusion and the second protrusion being formed at positions opposed to each other in the through hole, and at least one of the first protrusion and the second protrusion being a terminal that transmits power to the power semiconductor element.