Semiconductor Package Through-Hole Molding for Thin Stable Bonding
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Solution Overview
Problem
The existing technologies for semiconductor packages result in thicker packages with inferior bonding stability due to the stacking and mounting of semiconductor chips, which complicates the integration of high-performance, high-speed, and compact electronic components.
Innovation Solution
A semiconductor package design featuring a package substrate with a concave portion and oblique through-hole, allowing multiple semiconductor chips to be mounted on both sides and molded using a single process, reducing overall thickness and improving bonding stability through efficient resin injection and distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If semiconductor chips are stacked and mounted on a single semiconductor substrate, then the integration of high-performance electronic components is achieved, but the package thickness increases and bonding stability deteriorates
Solution Approach 1:
The patent utilizes the through-hole dimension extending through the package substrate to enable resin injection from the first surface to the second surface. This vertical dimensionality allows the molding resin to flow through and encapsulate chips mounted on both surfaces, achieving comprehensive coverage without increasing lateral package dimensions.
Solution Approach 2:
The molding resin is nested within the through-hole structure, filling the vertical space from the first surface through to the second surface. This nesting approach allows the resin to conformally encapsulate the stacked chips while maintaining a compact overall package structure.
2Adaptability or versatility
If semiconductor chips are stacked and mounted on a single semiconductor substrate, then the integration of high-performance electronic components is achieved, but bonding stability becomes inferior
Solution Approach 1:
The molding resin performs multiple functions simultaneously: it provides mechanical bonding between chips and substrate, fills voids in the stacked structure, and protects exposed surfaces. This self-service approach of the resin enhances bonding stability across all interfaces without requiring additional dedicated bonding structures.
Solution Approach 2:
The patent employs a composite structure where the molding resin combines multiple functional properties - structural support, electrical insulation, and mechanical bonding. This composite material approach within the through-hole enables simultaneous improvement of bonding stability for chips mounted on both surfaces.
3Manufacturing precision
If chips on both surfaces are molded using separate processes, then complete coverage is achieved, but the manufacturing complexity increases
Solution Approach 1:
The patent merges two separate molding operations into a single unified process by injecting resin through the through-hole from the first surface. This single injection process simultaneously molds chips on both the first and second surfaces, reducing manufacturing complexity while maintaining complete coverage.
Solution Approach 2:
The through-hole structure serves multiple functions: it acts as a resin injection channel, a support structure during molding, and a pathway for resin to reach chips on both surfaces. This multi-functionality enables a single molding process to achieve what would otherwise require two separate processes.
Data Source
AI summary
A semiconductor package is provided. The semiconductor package includes: a package substrate having a first surface, a second surface that is provided opposite the first surface and has a concave portion, and a through-hole having a side surface that is oblique with respect to the first surface, and a first diameter of a first opening of the through-hole defined through the first surface being less than a second diameter of a second opening of the through-hole defined through a bottom surface of the concave portion; a plurality of first semiconductor chips provided on the first surface; a second semiconductor chip provided on the bottom surface; and a molding portion provided in the through-hole, and covering the plurality of first semiconductor chips and the second semiconductor chip.