Semiconductor Package Structure Using TMVs to Mitigate IPD Stress

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Solution Overview

Problem

The semiconductor industry faces challenges with through-silicon vias (TSVs) due to induced stress in double-side integrated passive devices (IPDs), incompatibility with deep-trench capacitor processes, and high costs and lower throughput in fabrication.

Innovation Solution

The use of through-molding vias (TMVs) in a polymer-based material for forming connection structures in semiconductor package structures, which are more compatible with various IPDs and allow for stress mitigation and pre-manufacturing testing, improving yield control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through-silicon vias (TSVs) are used for forming connection structures, then electrical connection between layers is achieved, but stress is induced in double-side integrated passive devices (IPDs) and manufacturing costs increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidstress in IPDs
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary material layer between the TSV and the IPD that acts as a stress buffer. This intermediary layer absorbs the stress generated by the TSV, preventing it from being transmitted to the IPD, thereby maintaining electrical connection while eliminating the harmful stress effect.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the stress-generating function from the TSV structure by separating the electrical connection function from the mechanical support function. The TSV provides only electrical connection, while a separate structural support element provides mechanical support without inducing stress in the IPD.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If through-silicon vias (TSVs) are used for forming connection structures, then electrical connection is achieved, but compatibility with deep-trench capacitor processes is lost

Engineering Contradiction:
Improveelectrical connectionVSAvoidcompatibility with deep-trench capacitor processes
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the connection structure into multiple independent components: the TSV for electrical connection, a separate support structure for mechanical stability, and process-compatible materials that work with deep-trench capacitor fabrication. This segmentation allows each component to be optimized independently for its specific function while maintaining overall compatibility.

Inventive Principle:
Principle #1Segmentation

3Reliability

If through-silicon vias (TSVs) are used for forming connection structures, then electrical connection is achieved, but manufacturing throughput decreases and costs increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-forming the TSV structures and support elements as separate components before final assembly. This allows parallel processing of multiple components simultaneously, reducing the overall manufacturing cycle time and increasing throughput while maintaining connection reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240047310A1Semiconductor package structure and method for manufacturing the same
Publication Date: 2024.02.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240047310A1 patent drawing
  • US20240047310A1 patent drawing
  • US20240047310A1 patent drawing

AI summary

A semiconductor structure includes a molding compound having a first surface and a second surface opposite to the first surface, a passive device component disposed in the molding compound, a via penetrating the molding compound from the first surface to the second surface, a first connection structure disposed over the first surface of the molding compound and electrically coupled to the passive device component, and a second connection structure disposed over the second surface of the molding compound. The first connection structure and the second connection structure are electrically coupled to each other by the via.