Semiconductor Package With Top Interposer for Chip Integration

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Solution Overview

Problem

Integrated circuit (IC) products with separate packages for different functions increase system board area, power loss, and cost due to the need for multiple components and complex connections.

Innovation Solution

A semiconductor package design that includes a package substrate, multiple semiconductor chips, and a top interposer, where the chips are electrically connected through trace layers and connection elements, allowing for chip-to-chip and chip-to-substrate connections, reducing the need for multiple packages and enhancing interconnectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If separate packages are used for different IC functions, then each function can be independently designed and manufactured, but the system board area increases and power loss increases

Engineering Contradiction:

ImproveIndependent design and manufacture of IC functionsVSAvoidSystem board area

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent combines multiple separate IC packages into a single integrated package structure. Multiple semiconductor chips (first semiconductor chip, second semiconductor chip, third semiconductor chip) are mounted on a common package substrate and interconnected through trace layers and connection elements, eliminating the need for separate packages and reducing system board area.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The package substrate serves multiple functions simultaneously: it acts as a mechanical support structure, an electrical interconnection network (through trace layers and connection elements), and a mounting platform for multiple semiconductor chips. This multi-functionality reduces the need for additional components and board space.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Ease of manufacture

If separate packages are used for different IC functions, then each function can be independently designed and manufactured, but power loss increases

Engineering Contradiction:

ImproveIndependent design and manufacture of IC functionsVSAvoidPower loss

Core Design Contradiction:

Ease of manufactureVSLoss of energy

Solution Approach 1:

By merging multiple separate packages into one integrated structure with shared power and ground connections through the package substrate, the patent reduces redundant power distribution paths and minimizes power loss associated with multiple separate connections.

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If separate packages are used for different IC functions, then component flexibility is maintained, but the cost of the integrated solution increases

Engineering Contradiction:

ImproveComponent flexibilityVSAvoidCost of integrated solution

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent maintains segmentation of different IC functions into separate semiconductor chips that can be independently designed and manufactured, then integrated into a single package. This allows component flexibility and adaptability while achieving cost reductions through shared package infrastructure.

Inventive Principle:

Principle #1Segmentation

4Adaptability or versatility

If multiple packages are used on the system board, then functional separation is achieved, but device complexity increases

Engineering Contradiction:

ImproveFunctional separationVSAvoidSystem board complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges multiple separate packages into one integrated package, reducing system board complexity by eliminating multiple discrete components and their interconnections. The functional separation is maintained through internal chip-level separation within the unified package structure.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS9984995B1Semiconductor package and manufacturing method thereof

Publication Date: 2018.05.29 NAN YA TECH

AI summary

A semiconductor package includes a package substrate, a first semiconductor chip, a second semiconductor chip, and a top interposer. The first semiconductor chip and the second semiconductor chip are disposed on the package substrate. The top interposer is electrically connected to the first semiconductor chip and the second semiconductor chip, and the first semiconductor chip and the second semiconductor chip are present between the package substrate and the top interposer.