Semiconductor Package TSV Buffer Structure for Multi-Die Integration
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Solution Overview
Problem
The increasing complexity of integrated circuit packages, which integrate multiple device dies with different technologies and functions, poses challenges in manufacturing cost and device performance optimization.
Innovation Solution
The formation of a semiconductor package involves creating a metal via electrically coupled to a through substrate via (TSV) that penetrates through a semiconductor substrate, followed by back-side thinning, attachment of a sacrificial carrier, and encapsulation in an encapsulant to reveal the semiconductor substrate and form a buffer structure with embedded metal vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple device dies are integrated in the same package to achieve more functions, then device performance and functionality are improved, but manufacturing complexity and cost increase
Solution Approach 1:
The package is divided into multiple device dies, each performing specific functions, which are then integrated together. This segmentation allows for optimized manufacturing of individual dies while achieving complex overall functionality through their combination in the package.
Solution Approach 2:
The package structure is designed to accommodate multiple device dies with different technologies and functions, creating a universal platform that can integrate processors, memory cubes, and other components to achieve system-level functionality beyond what single dies can provide.
2Adaptability or versatility
If device dies with different technologies and functions are integrated together, then system functionality is improved, but manufacturing precision requirements increase
Solution Approach 1:
An intermediary package structure is introduced that facilitates the integration of device dies with different technologies and functions. This intermediary structure provides standardized interfaces and alignment mechanisms that reduce the precision requirements for directly bonding different types of dies together.
Solution Approach 2:
Different regions of the package are designed with locally optimized properties to accommodate specific device types. This allows each device die to be manufactured with precision requirements appropriate to its function, while the overall package structure manages the integration of these diverse components.
3Reliability
If device dies are bonded and integrated together to form a system, then device performance is improved, but manufacturing cost increases
Solution Approach 1:
Multiple device dies are merged into a single integrated package, combining their individual functionalities to achieve superior device performance. This merging allows for optimized resource utilization and reduced overall system cost compared to using separate discrete components.
Solution Approach 2:
The integrated package serves as a universal system that combines multiple functions into a single unit, improving device performance while potentially reducing the need for separate components and their associated assembly costs, thereby offsetting the increased integration complexity.
Data Source
AI summary
A method includes forming a metal post over a first redistribution structure; attaching a first device die to the first redistribution structure, the first device die comprising a through via embedded in a semiconductor substrate; encapsulating the metal post and the first device die in an encapsulant, a first top surface of the encapsulant being level with a second top surface of the semiconductor substrate; recessing the second top surface to expose the through via; forming a dielectric isolation layer around the through via; forming a dielectric layer over the dielectric isolation layer; etching the dielectric layer to form a first opening and a second opening in the dielectric layer; forming a first metal via in the first opening and a second metal via in the second opening; and forming a second redistribution structure over the dielectric layer.