Semiconductor Package EMI Shielding via TSVs and Metal Layers
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Solution Overview
Problem
Semiconductor packages face challenges in effectively addressing electromagnetic interference (EMI) due to increased carrier frequencies, which can disrupt signal integrity and power integrity, especially in smaller, lower power components, leading to increased size, cost, and bulk with traditional external shielding solutions.
Innovation Solution
Integrating an EMI shield within the semiconductor package using through-silicon vias (TSVs) and metal layers, forming a Faraday cage-like structure that connects the back side metallization to the solder ball array and system board, thereby providing protection from both internal and external interference without the need for additional external shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional external shielding solutions are used, then EMI protection is provided, but package size and cost increase
Solution Approach 1:
The patent combines the EMI shielding function with the existing package substrate structure by integrating ground planes and via holes directly into the substrate layers. This merging of shielding functionality into the base structure eliminates the need for separate external shielding components, thereby protecting against EMI without increasing package size.
Solution Approach 2:
The shielding structure is nested within the multi-layer package substrate itself, with ground planes and via holes embedded in the internal layers. This nesting approach allows the shielding function to be contained within the existing package footprint, avoiding any increase in external dimensions while still providing effective EMI protection.
2Object-affected harmful factors
If traditional external shielding solutions are used, then EMI protection is provided, but manufacturing cost increases
Solution Approach 1:
By combining the shielding function with the standard multi-layer PCB manufacturing process, the patent eliminates the need for separate shielding component procurement and assembly steps. The ground planes and via holes are created using conventional PCB fabrication techniques, significantly reducing manufacturing cost compared to adding external shielding components.
Solution Approach 2:
The package substrate serves multiple functions simultaneously: it provides mechanical support, electrical connections through vias, signal routing, and EMI shielding through its ground planes. This multi-functionality reduces the total component count and assembly complexity, thereby lowering manufacturing costs while maintaining effective EMI protection.
3Speed
If carrier frequencies are increased for wireless data, then data transmission capability is improved, but EMI susceptibility increases
Solution Approach 1:
The patent implements preliminary anti-action by pre-establishing ground planes and shielding structures within the package substrate before high-frequency signals are transmitted. This proactive shielding approach creates a controlled electromagnetic environment that prevents external EMI from affecting the high-speed data transmission circuits, allowing carrier frequency increases without proportionally increasing EMI susceptibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the size and cost of semiconductor packages while providing effective EMI shielding, maintaining signal and power integrity by creating a shielded environment within the package, potentially requiring no additional external shielding and minimizing interference between components.
Implementation Method 1
Integrating an EMI shield within the semiconductor package using through-silicon vias (TSVs) and metal layers, forming a Faraday cage-like structure
Data Source
AI summary
A semiconductor package is described herein with electromagnetic shielding using metal layers and vias. In one example, the package includes a silicon substrate having a front side and a back side, the front side including active circuitry and an array of contacts to attach to a substrate, a metallization layer over the back side of the die to shield active circuitry from interference through the back side, and a plurality of through-silicon vias coupled to the back side metallization at one end and to front side lands of the array of lands at the other end to shield active circuitry from interference through the sides of the die.


