Semiconductor Package Terminal Layout for Twist-Shift Alignment
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Solution Overview
Problem
The integration of multiple chips in semiconductor devices leads to issues such as shape abnormalities in metal bumps, resulting in yield drops and inferior electrical properties, and alignment of metal bumps is crucial for fabricating stable semiconductor devices.
Innovation Solution
A semiconductor package design featuring substrates with aligned connection terminals and solder structures that allow for twist-shift alignment, ensuring stable electrical connections and reduced defects through the use of first and second substrates with specific axis orientations and twist-shift angles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple chips are integrated in a semiconductor device, then functionality and performance are improved, but shape abnormalities in metal bumps occur leading to yield drops
Solution Approach 1:
The invention introduces asymmetric orientation of connection terminals where the minor axis is directed toward the center of the substrate while the major axis is orthogonal to it. This asymmetric geometric configuration compensates for alignment variations and prevents shape abnormalities in metal bumps during multi-chip integration, thereby maintaining high yield while achieving multi-functionality.
2Adaptability or versatility
If integration of chips is increased, then device functionality is improved, but alignment of metal bumps becomes more critical and difficult
Solution Approach 1:
The asymmetric orientation of connection terminals with minor axes directed toward the substrate center creates a geometric reference that facilitates alignment during multi-chip integration. This asymmetric configuration allows for tolerance compensation and maintains manufacturing precision even as integration complexity increases.
Solution Approach 2:
The invention addresses alignment challenges by introducing a specific angular orientation dimension - the connection terminals are oriented at specific angles where the minor axis points to the center. This angular dimension provides an additional alignment reference that simplifies the positioning process in multi-chip integration.
3Quantity of substance
If more solder bumps are provided between chips, then electrical connection is improved, but shape abnormality leads to inferior electrical properties
Solution Approach 1:
The asymmetric orientation of connection terminals ensures that even with increased quantity of solder bumps for improved electrical connection, the specific geometric configuration (minor axis toward center) prevents shape abnormalities. This maintains the electrical properties despite the increased complexity and quantity of connections.
Data Source
AI summary
Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a first substrate having first pads on a first surface of the first substrate, a second substrate on the first substrate and having a plurality of second pads on a second surface of the second substrate, and connection terminals between the first substrate and the second substrate and correspondingly coupling the first pad to the second pads. Each of the connection terminals has a first major axis and a first minor axis that are parallel to the first surface of the first substrate and are orthogonal to each other. When viewed in a plan view, the first minor axis of each of the connection terminals is directed toward a center of the first substrate.