Semiconductor Package Insulating Structure for UBM Thermal Stress
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Solution Overview
Problem
Semiconductor packages face reliability issues due to thermal stress, particularly around under bump metallurgy (UBM) layers, where differences in thermal expansion coefficients between materials lead to mechanical damage such as cracks.
Innovation Solution
A semiconductor package design incorporating a redistribution substrate with photosensitive and non-photosensitive insulating layers, where the non-photosensitive layer is buried within the photosensitive layer and forms the outer surface, providing enhanced toughness and elongation to withstand thermal stress, and UBM connectors are formed with a seed layer and plated to connect to redistribution layers through contact holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a photosensitive insulating layer is used alone, then manufacturing precision is improved, but reliability deteriorates due to thermal stress cracks
Solution Approach 1:
The patent uses a composite insulating layer structure combining a photosensitive insulating layer and a non-photosensitive insulating layer. The photosensitive layer provides precise contact hole formation through photolithography, while the non-photosensitive layer provides thermal stress resistance. This composite structure resolves the contradiction by integrating materials with complementary properties.
Solution Approach 2:
The non-photosensitive insulating layer is selectively positioned at the bottom of the contact hole and surrounding the UBM connector, where thermal stress concentration occurs. This local placement provides targeted thermal stress resistance without compromising the overall manufacturing precision achieved by the photosensitive layer.
2Reliability
If the insulating layer is made more durable against thermal stress, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent employs a composite insulating layer system with two distinct layers: a photosensitive insulating layer for precise patterning and a non-photosensitive insulating layer for thermal stress resistance. This composite approach improves reliability while maintaining manageable complexity through functional differentiation.
Solution Approach 2:
The insulating layer is segmented into two functional parts: the photosensitive portion that enables precise contact hole formation and the non-photosensitive portion that provides thermal stress resistance. This segmentation allows each layer to be optimized for its specific function, improving overall reliability without excessive complexity.
Data Source
AI summary
A semiconductor package includes a redistribution substrate having a first surface and a second surface opposite to each other, and including a plurality of first photosensitive insulating layers and a plurality of redistribution layers disposed among the plurality of first photosensitive insulating layers; at least one semiconductor chip disposed on the first surface of the redistribution substrate and including a plurality of contact pads electrically connected to the plurality of redistribution layers; a protective insulating layer including a second photosensitive insulating layer disposed on the second surface of the redistribution substrate and having a plurality of contact holes, and a non-photosensitive insulating layer disposed on an outer surface of the second photosensitive insulating layer and an internal sidewall of each of the plurality of contact holes; and a plurality of under bump metallurgy (UBM) connectors each having a UBM pad disposed on the protective insulating layer and a UBM via disposed in a respective contact hole of the plurality of contact holes and electrically connected to the plurality of redistribution layers.