Semiconductor Package Underfill Layout for Die Shift Prevention

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Solution Overview

Problem

Existing semiconductor packaging technologies face challenges with die dislocation during the molding process, leading to reduced yields due to undesirable movement of semiconductor dies under molding pressure, which affects the alignment of subsequent materials in the redistribution layer (RDL).

Innovation Solution

The use of an underfill material surrounding the semiconductor dies before encapsulation helps prevent die movement by securing them in place, ensuring proper alignment of subsequent layers and improving packaging reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If molding material is formed to cover semiconductor dies, then encapsulation is achieved, but die dislocation occurs due to molding pressure

Engineering Contradiction:
Improveencapsulation qualityVSAvoiddie alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The underfill material is applied to the semiconductor dies before the encapsulation process. This preliminary action secures the dies in their proper positions, preventing dislocation when molding pressure is subsequently applied during encapsulation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The underfill material acts as an intermediary substance between the semiconductor dies and the molding material. It provides mechanical support and positioning for the dies, mediating the effect of molding pressure to prevent die displacement while still allowing complete encapsulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If molding pressure is applied to cover dies, then encapsulation is completed, but die movement causes misalignment of subsequent materials

Engineering Contradiction:
Improveencapsulation processVSAvoidRDL alignment
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The underfill material is applied in advance to secure dies before encapsulation. This preliminary positioning action ensures that when molding pressure is applied for easy encapsulation, the dies remain properly aligned for subsequent RDL material deposition.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The underfill material provides a cushioning effect beforehand, absorbing and distributing the molding pressure uniformly. This prevents localized stress concentrations that would cause die movement and subsequent misalignment of RDL materials.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If semiconductor dies are positioned on carrier, then wafer level packaging is enabled, but die dislocation reduces manufacturing yield

Engineering Contradiction:
Improvewafer level packaging efficiencyVSAvoidpackage yield
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The underfill material is applied to each die on the wafer before encapsulation. This preliminary action maintains die positions throughout the high-productivity wafer-level packaging process, preventing dislocation and ensuring high manufacturing yield.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The underfill material provides self-positioning and self-support for the semiconductor dies during the packaging process. Each die is independently secured by its own underfill, enabling wafer-level processing while maintaining individual die alignment and maximizing yield.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250132214A1Semiconductor package and manufacturing method thereof
Publication Date: 2025.04.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250132214A1 patent drawing
  • US20250132214A1 patent drawing
  • US20250132214A1 patent drawing

AI summary

A semiconductor package includes a chiplet, a first underfill surrounding the chiplet, and a first encapsulant laterally covering the first underfill. The chiplet includes a semiconductor substrate and die connectors disposed over the semiconductor substrate. The first underfill includes first fillers, and a portion of the first fillers has a substantially planar surface at a first surface of the first underfill. The first encapsulant includes a first surface and a second surface opposite to the first surface, the first surface is substantially leveled with surfaces of the die connectors, and the second surface is substantially leveled with the first surface of the first underfill.