Semiconductor Package Layout for Void-Free Underfill Flow
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Solution Overview
Problem
Conventional semiconductor packaging methods face challenges in achieving uniform underfill flow and preventing voids, which affect the mechanical stability of the package due to constant lateral dimensions in the space between semiconductor devices.
Innovation Solution
The semiconductor package design features a redistribution structure with semiconductor devices arranged such that the space between them has lateral dimensions decreasing continuously from the front to the back surfaces, improving the uniformity of the underfill layer flow and preventing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the space between semiconductor devices has constant lateral dimensions, then the packaging structure is simple to manufacture, but the underfill layer flow uniformity deteriorates and voids form
Solution Approach 1:
The patent applies asymmetry by designing the space between semiconductor devices with non-uniform lateral dimensions that decrease continuously from the front surface to the back surface. This asymmetric geometry creates a gradient flow path for the underfill layer, ensuring uniform flow distribution and preventing void formation, while resolving the contradiction between flow uniformity and geometric simplicity.
Solution Approach 2:
The patent changes the geometric parameters of the space between devices by implementing continuously varying lateral dimensions. This parameter change transforms the constant-dimension space into a gradient space, which controls the underfill layer flow characteristics and eliminates voids, thereby improving manufacturing precision without excessive complexity.
2Reliability
If the space between semiconductor devices has constant lateral dimensions, then the device structure is simple, but void formation increases and mechanical stability deteriorates
Solution Approach 1:
The asymmetric space configuration with decreasing lateral dimensions from front to back surfaces prevents void formation during underfill layer deposition. This asymmetric design improves mechanical stability and reliability by ensuring complete void-free encapsulation, while maintaining reasonable structural complexity through a systematic geometric gradient.
Solution Approach 2:
The patent converts the potential harm of increased device complexity into a benefit by using the geometric gradient to eliminate voids. The non-uniform space configuration, while more complex than constant dimensions, transforms the underfill flow process to prevent void formation, thereby improving mechanical stability and converting structural complexity into a reliability enhancement.
Data Source
AI summary
An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.